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00028 #include "dsputil.h"
00029
00030
00033 static void vc1_v_overlap_c(uint8_t* src, int stride)
00034 {
00035 int i;
00036 int a, b, c, d;
00037 int d1, d2;
00038 int rnd = 1;
00039 for(i = 0; i < 8; i++) {
00040 a = src[-2*stride];
00041 b = src[-stride];
00042 c = src[0];
00043 d = src[stride];
00044 d1 = (a - d + 3 + rnd) >> 3;
00045 d2 = (a - d + b - c + 4 - rnd) >> 3;
00046
00047 src[-2*stride] = a - d1;
00048 src[-stride] = av_clip_uint8(b - d2);
00049 src[0] = av_clip_uint8(c + d2);
00050 src[stride] = d + d1;
00051 src++;
00052 rnd = !rnd;
00053 }
00054 }
00055
00058 static void vc1_h_overlap_c(uint8_t* src, int stride)
00059 {
00060 int i;
00061 int a, b, c, d;
00062 int d1, d2;
00063 int rnd = 1;
00064 for(i = 0; i < 8; i++) {
00065 a = src[-2];
00066 b = src[-1];
00067 c = src[0];
00068 d = src[1];
00069 d1 = (a - d + 3 + rnd) >> 3;
00070 d2 = (a - d + b - c + 4 - rnd) >> 3;
00071
00072 src[-2] = a - d1;
00073 src[-1] = av_clip_uint8(b - d2);
00074 src[0] = av_clip_uint8(c + d2);
00075 src[1] = d + d1;
00076 src += stride;
00077 rnd = !rnd;
00078 }
00079 }
00080
00089 static av_always_inline int vc1_filter_line(uint8_t* src, int stride, int pq){
00090 uint8_t *cm = ff_cropTbl + MAX_NEG_CROP;
00091
00092 int a0 = (2*(src[-2*stride] - src[ 1*stride]) - 5*(src[-1*stride] - src[ 0*stride]) + 4) >> 3;
00093 int a0_sign = a0 >> 31;
00094 a0 = (a0 ^ a0_sign) - a0_sign;
00095 if(a0 < pq){
00096 int a1 = FFABS((2*(src[-4*stride] - src[-1*stride]) - 5*(src[-3*stride] - src[-2*stride]) + 4) >> 3);
00097 int a2 = FFABS((2*(src[ 0*stride] - src[ 3*stride]) - 5*(src[ 1*stride] - src[ 2*stride]) + 4) >> 3);
00098 if(a1 < a0 || a2 < a0){
00099 int clip = src[-1*stride] - src[ 0*stride];
00100 int clip_sign = clip >> 31;
00101 clip = ((clip ^ clip_sign) - clip_sign)>>1;
00102 if(clip){
00103 int a3 = FFMIN(a1, a2);
00104 int d = 5 * (a3 - a0);
00105 int d_sign = (d >> 31);
00106 d = ((d ^ d_sign) - d_sign) >> 3;
00107 d_sign ^= a0_sign;
00108
00109 if( d_sign ^ clip_sign )
00110 d = 0;
00111 else{
00112 d = FFMIN(d, clip);
00113 d = (d ^ d_sign) - d_sign;
00114 src[-1*stride] = cm[src[-1*stride] - d];
00115 src[ 0*stride] = cm[src[ 0*stride] + d];
00116 }
00117 return 1;
00118 }
00119 }
00120 }
00121 return 0;
00122 }
00123
00133 static inline void vc1_loop_filter(uint8_t* src, int step, int stride, int len, int pq)
00134 {
00135 int i;
00136 int filt3;
00137
00138 for(i = 0; i < len; i += 4){
00139 filt3 = vc1_filter_line(src + 2*step, stride, pq);
00140 if(filt3){
00141 vc1_filter_line(src + 0*step, stride, pq);
00142 vc1_filter_line(src + 1*step, stride, pq);
00143 vc1_filter_line(src + 3*step, stride, pq);
00144 }
00145 src += step * 4;
00146 }
00147 }
00148
00149 static void vc1_v_loop_filter4_c(uint8_t *src, int stride, int pq)
00150 {
00151 vc1_loop_filter(src, 1, stride, 4, pq);
00152 }
00153
00154 static void vc1_h_loop_filter4_c(uint8_t *src, int stride, int pq)
00155 {
00156 vc1_loop_filter(src, stride, 1, 4, pq);
00157 }
00158
00159 static void vc1_v_loop_filter8_c(uint8_t *src, int stride, int pq)
00160 {
00161 vc1_loop_filter(src, 1, stride, 8, pq);
00162 }
00163
00164 static void vc1_h_loop_filter8_c(uint8_t *src, int stride, int pq)
00165 {
00166 vc1_loop_filter(src, stride, 1, 8, pq);
00167 }
00168
00169 static void vc1_v_loop_filter16_c(uint8_t *src, int stride, int pq)
00170 {
00171 vc1_loop_filter(src, 1, stride, 16, pq);
00172 }
00173
00174 static void vc1_h_loop_filter16_c(uint8_t *src, int stride, int pq)
00175 {
00176 vc1_loop_filter(src, stride, 1, 16, pq);
00177 }
00178
00181 static void vc1_inv_trans_8x8_dc_c(uint8_t *dest, int linesize, DCTELEM *block)
00182 {
00183 int i;
00184 int dc = block[0];
00185 const uint8_t *cm = ff_cropTbl + MAX_NEG_CROP;
00186 dc = (3 * dc + 1) >> 1;
00187 dc = (3 * dc + 16) >> 5;
00188 for(i = 0; i < 8; i++){
00189 dest[0] = cm[dest[0]+dc];
00190 dest[1] = cm[dest[1]+dc];
00191 dest[2] = cm[dest[2]+dc];
00192 dest[3] = cm[dest[3]+dc];
00193 dest[4] = cm[dest[4]+dc];
00194 dest[5] = cm[dest[5]+dc];
00195 dest[6] = cm[dest[6]+dc];
00196 dest[7] = cm[dest[7]+dc];
00197 dest += linesize;
00198 }
00199 }
00200
00201 static void vc1_inv_trans_8x8_c(DCTELEM block[64])
00202 {
00203 int i;
00204 register int t1,t2,t3,t4,t5,t6,t7,t8;
00205 DCTELEM *src, *dst;
00206
00207 src = block;
00208 dst = block;
00209 for(i = 0; i < 8; i++){
00210 t1 = 12 * (src[0] + src[4]) + 4;
00211 t2 = 12 * (src[0] - src[4]) + 4;
00212 t3 = 16 * src[2] + 6 * src[6];
00213 t4 = 6 * src[2] - 16 * src[6];
00214
00215 t5 = t1 + t3;
00216 t6 = t2 + t4;
00217 t7 = t2 - t4;
00218 t8 = t1 - t3;
00219
00220 t1 = 16 * src[1] + 15 * src[3] + 9 * src[5] + 4 * src[7];
00221 t2 = 15 * src[1] - 4 * src[3] - 16 * src[5] - 9 * src[7];
00222 t3 = 9 * src[1] - 16 * src[3] + 4 * src[5] + 15 * src[7];
00223 t4 = 4 * src[1] - 9 * src[3] + 15 * src[5] - 16 * src[7];
00224
00225 dst[0] = (t5 + t1) >> 3;
00226 dst[1] = (t6 + t2) >> 3;
00227 dst[2] = (t7 + t3) >> 3;
00228 dst[3] = (t8 + t4) >> 3;
00229 dst[4] = (t8 - t4) >> 3;
00230 dst[5] = (t7 - t3) >> 3;
00231 dst[6] = (t6 - t2) >> 3;
00232 dst[7] = (t5 - t1) >> 3;
00233
00234 src += 8;
00235 dst += 8;
00236 }
00237
00238 src = block;
00239 dst = block;
00240 for(i = 0; i < 8; i++){
00241 t1 = 12 * (src[ 0] + src[32]) + 64;
00242 t2 = 12 * (src[ 0] - src[32]) + 64;
00243 t3 = 16 * src[16] + 6 * src[48];
00244 t4 = 6 * src[16] - 16 * src[48];
00245
00246 t5 = t1 + t3;
00247 t6 = t2 + t4;
00248 t7 = t2 - t4;
00249 t8 = t1 - t3;
00250
00251 t1 = 16 * src[ 8] + 15 * src[24] + 9 * src[40] + 4 * src[56];
00252 t2 = 15 * src[ 8] - 4 * src[24] - 16 * src[40] - 9 * src[56];
00253 t3 = 9 * src[ 8] - 16 * src[24] + 4 * src[40] + 15 * src[56];
00254 t4 = 4 * src[ 8] - 9 * src[24] + 15 * src[40] - 16 * src[56];
00255
00256 dst[ 0] = (t5 + t1) >> 7;
00257 dst[ 8] = (t6 + t2) >> 7;
00258 dst[16] = (t7 + t3) >> 7;
00259 dst[24] = (t8 + t4) >> 7;
00260 dst[32] = (t8 - t4 + 1) >> 7;
00261 dst[40] = (t7 - t3 + 1) >> 7;
00262 dst[48] = (t6 - t2 + 1) >> 7;
00263 dst[56] = (t5 - t1 + 1) >> 7;
00264
00265 src++;
00266 dst++;
00267 }
00268 }
00269
00272 static void vc1_inv_trans_8x4_dc_c(uint8_t *dest, int linesize, DCTELEM *block)
00273 {
00274 int i;
00275 int dc = block[0];
00276 const uint8_t *cm = ff_cropTbl + MAX_NEG_CROP;
00277 dc = ( 3 * dc + 1) >> 1;
00278 dc = (17 * dc + 64) >> 7;
00279 for(i = 0; i < 4; i++){
00280 dest[0] = cm[dest[0]+dc];
00281 dest[1] = cm[dest[1]+dc];
00282 dest[2] = cm[dest[2]+dc];
00283 dest[3] = cm[dest[3]+dc];
00284 dest[4] = cm[dest[4]+dc];
00285 dest[5] = cm[dest[5]+dc];
00286 dest[6] = cm[dest[6]+dc];
00287 dest[7] = cm[dest[7]+dc];
00288 dest += linesize;
00289 }
00290 }
00291
00292 static void vc1_inv_trans_8x4_c(uint8_t *dest, int linesize, DCTELEM *block)
00293 {
00294 int i;
00295 register int t1,t2,t3,t4,t5,t6,t7,t8;
00296 DCTELEM *src, *dst;
00297 const uint8_t *cm = ff_cropTbl + MAX_NEG_CROP;
00298
00299 src = block;
00300 dst = block;
00301 for(i = 0; i < 4; i++){
00302 t1 = 12 * (src[0] + src[4]) + 4;
00303 t2 = 12 * (src[0] - src[4]) + 4;
00304 t3 = 16 * src[2] + 6 * src[6];
00305 t4 = 6 * src[2] - 16 * src[6];
00306
00307 t5 = t1 + t3;
00308 t6 = t2 + t4;
00309 t7 = t2 - t4;
00310 t8 = t1 - t3;
00311
00312 t1 = 16 * src[1] + 15 * src[3] + 9 * src[5] + 4 * src[7];
00313 t2 = 15 * src[1] - 4 * src[3] - 16 * src[5] - 9 * src[7];
00314 t3 = 9 * src[1] - 16 * src[3] + 4 * src[5] + 15 * src[7];
00315 t4 = 4 * src[1] - 9 * src[3] + 15 * src[5] - 16 * src[7];
00316
00317 dst[0] = (t5 + t1) >> 3;
00318 dst[1] = (t6 + t2) >> 3;
00319 dst[2] = (t7 + t3) >> 3;
00320 dst[3] = (t8 + t4) >> 3;
00321 dst[4] = (t8 - t4) >> 3;
00322 dst[5] = (t7 - t3) >> 3;
00323 dst[6] = (t6 - t2) >> 3;
00324 dst[7] = (t5 - t1) >> 3;
00325
00326 src += 8;
00327 dst += 8;
00328 }
00329
00330 src = block;
00331 for(i = 0; i < 8; i++){
00332 t1 = 17 * (src[ 0] + src[16]) + 64;
00333 t2 = 17 * (src[ 0] - src[16]) + 64;
00334 t3 = 22 * src[ 8] + 10 * src[24];
00335 t4 = 22 * src[24] - 10 * src[ 8];
00336
00337 dest[0*linesize] = cm[dest[0*linesize] + ((t1 + t3) >> 7)];
00338 dest[1*linesize] = cm[dest[1*linesize] + ((t2 - t4) >> 7)];
00339 dest[2*linesize] = cm[dest[2*linesize] + ((t2 + t4) >> 7)];
00340 dest[3*linesize] = cm[dest[3*linesize] + ((t1 - t3) >> 7)];
00341
00342 src ++;
00343 dest++;
00344 }
00345 }
00346
00349 static void vc1_inv_trans_4x8_dc_c(uint8_t *dest, int linesize, DCTELEM *block)
00350 {
00351 int i;
00352 int dc = block[0];
00353 const uint8_t *cm = ff_cropTbl + MAX_NEG_CROP;
00354 dc = (17 * dc + 4) >> 3;
00355 dc = (12 * dc + 64) >> 7;
00356 for(i = 0; i < 8; i++){
00357 dest[0] = cm[dest[0]+dc];
00358 dest[1] = cm[dest[1]+dc];
00359 dest[2] = cm[dest[2]+dc];
00360 dest[3] = cm[dest[3]+dc];
00361 dest += linesize;
00362 }
00363 }
00364
00365 static void vc1_inv_trans_4x8_c(uint8_t *dest, int linesize, DCTELEM *block)
00366 {
00367 int i;
00368 register int t1,t2,t3,t4,t5,t6,t7,t8;
00369 DCTELEM *src, *dst;
00370 const uint8_t *cm = ff_cropTbl + MAX_NEG_CROP;
00371
00372 src = block;
00373 dst = block;
00374 for(i = 0; i < 8; i++){
00375 t1 = 17 * (src[0] + src[2]) + 4;
00376 t2 = 17 * (src[0] - src[2]) + 4;
00377 t3 = 22 * src[1] + 10 * src[3];
00378 t4 = 22 * src[3] - 10 * src[1];
00379
00380 dst[0] = (t1 + t3) >> 3;
00381 dst[1] = (t2 - t4) >> 3;
00382 dst[2] = (t2 + t4) >> 3;
00383 dst[3] = (t1 - t3) >> 3;
00384
00385 src += 8;
00386 dst += 8;
00387 }
00388
00389 src = block;
00390 for(i = 0; i < 4; i++){
00391 t1 = 12 * (src[ 0] + src[32]) + 64;
00392 t2 = 12 * (src[ 0] - src[32]) + 64;
00393 t3 = 16 * src[16] + 6 * src[48];
00394 t4 = 6 * src[16] - 16 * src[48];
00395
00396 t5 = t1 + t3;
00397 t6 = t2 + t4;
00398 t7 = t2 - t4;
00399 t8 = t1 - t3;
00400
00401 t1 = 16 * src[ 8] + 15 * src[24] + 9 * src[40] + 4 * src[56];
00402 t2 = 15 * src[ 8] - 4 * src[24] - 16 * src[40] - 9 * src[56];
00403 t3 = 9 * src[ 8] - 16 * src[24] + 4 * src[40] + 15 * src[56];
00404 t4 = 4 * src[ 8] - 9 * src[24] + 15 * src[40] - 16 * src[56];
00405
00406 dest[0*linesize] = cm[dest[0*linesize] + ((t5 + t1) >> 7)];
00407 dest[1*linesize] = cm[dest[1*linesize] + ((t6 + t2) >> 7)];
00408 dest[2*linesize] = cm[dest[2*linesize] + ((t7 + t3) >> 7)];
00409 dest[3*linesize] = cm[dest[3*linesize] + ((t8 + t4) >> 7)];
00410 dest[4*linesize] = cm[dest[4*linesize] + ((t8 - t4 + 1) >> 7)];
00411 dest[5*linesize] = cm[dest[5*linesize] + ((t7 - t3 + 1) >> 7)];
00412 dest[6*linesize] = cm[dest[6*linesize] + ((t6 - t2 + 1) >> 7)];
00413 dest[7*linesize] = cm[dest[7*linesize] + ((t5 - t1 + 1) >> 7)];
00414
00415 src ++;
00416 dest++;
00417 }
00418 }
00419
00422 static void vc1_inv_trans_4x4_dc_c(uint8_t *dest, int linesize, DCTELEM *block)
00423 {
00424 int i;
00425 int dc = block[0];
00426 const uint8_t *cm = ff_cropTbl + MAX_NEG_CROP;
00427 dc = (17 * dc + 4) >> 3;
00428 dc = (17 * dc + 64) >> 7;
00429 for(i = 0; i < 4; i++){
00430 dest[0] = cm[dest[0]+dc];
00431 dest[1] = cm[dest[1]+dc];
00432 dest[2] = cm[dest[2]+dc];
00433 dest[3] = cm[dest[3]+dc];
00434 dest += linesize;
00435 }
00436 }
00437
00438 static void vc1_inv_trans_4x4_c(uint8_t *dest, int linesize, DCTELEM *block)
00439 {
00440 int i;
00441 register int t1,t2,t3,t4;
00442 DCTELEM *src, *dst;
00443 const uint8_t *cm = ff_cropTbl + MAX_NEG_CROP;
00444
00445 src = block;
00446 dst = block;
00447 for(i = 0; i < 4; i++){
00448 t1 = 17 * (src[0] + src[2]) + 4;
00449 t2 = 17 * (src[0] - src[2]) + 4;
00450 t3 = 22 * src[1] + 10 * src[3];
00451 t4 = 22 * src[3] - 10 * src[1];
00452
00453 dst[0] = (t1 + t3) >> 3;
00454 dst[1] = (t2 - t4) >> 3;
00455 dst[2] = (t2 + t4) >> 3;
00456 dst[3] = (t1 - t3) >> 3;
00457
00458 src += 8;
00459 dst += 8;
00460 }
00461
00462 src = block;
00463 for(i = 0; i < 4; i++){
00464 t1 = 17 * (src[ 0] + src[16]) + 64;
00465 t2 = 17 * (src[ 0] - src[16]) + 64;
00466 t3 = 22 * src[ 8] + 10 * src[24];
00467 t4 = 22 * src[24] - 10 * src[ 8];
00468
00469 dest[0*linesize] = cm[dest[0*linesize] + ((t1 + t3) >> 7)];
00470 dest[1*linesize] = cm[dest[1*linesize] + ((t2 - t4) >> 7)];
00471 dest[2*linesize] = cm[dest[2*linesize] + ((t2 + t4) >> 7)];
00472 dest[3*linesize] = cm[dest[3*linesize] + ((t1 - t3) >> 7)];
00473
00474 src ++;
00475 dest++;
00476 }
00477 }
00478
00479
00481 #define VC1_MSPEL_FILTER_16B(DIR, TYPE) \
00482 static av_always_inline int vc1_mspel_ ## DIR ## _filter_16bits(const TYPE *src, int stride, int mode) \
00483 { \
00484 switch(mode){ \
00485 case 0: \
00486 return 0; \
00487 case 1: \
00488 return -4*src[-stride] + 53*src[0] + 18*src[stride] - 3*src[stride*2]; \
00489 case 2: \
00490 return -src[-stride] + 9*src[0] + 9*src[stride] - src[stride*2]; \
00491 case 3: \
00492 return -3*src[-stride] + 18*src[0] + 53*src[stride] - 4*src[stride*2]; \
00493 } \
00494 return 0; \
00495 }
00496
00497 VC1_MSPEL_FILTER_16B(ver, uint8_t);
00498 VC1_MSPEL_FILTER_16B(hor, int16_t);
00499
00500
00503 static av_always_inline int vc1_mspel_filter(const uint8_t *src, int stride, int mode, int r)
00504 {
00505 switch(mode){
00506 case 0:
00507 return src[0];
00508 case 1:
00509 return (-4*src[-stride] + 53*src[0] + 18*src[stride] - 3*src[stride*2] + 32 - r) >> 6;
00510 case 2:
00511 return (-src[-stride] + 9*src[0] + 9*src[stride] - src[stride*2] + 8 - r) >> 4;
00512 case 3:
00513 return (-3*src[-stride] + 18*src[0] + 53*src[stride] - 4*src[stride*2] + 32 - r) >> 6;
00514 }
00515 return 0;
00516 }
00517
00520 #define VC1_MSPEL_MC(OP, OPNAME)\
00521 static void OPNAME ## vc1_mspel_mc(uint8_t *dst, const uint8_t *src, int stride, int hmode, int vmode, int rnd)\
00522 {\
00523 int i, j;\
00524 \
00525 if (vmode) { \
00526 int r;\
00527 \
00528 if (hmode) { \
00529 static const int shift_value[] = { 0, 5, 1, 5 };\
00530 int shift = (shift_value[hmode]+shift_value[vmode])>>1;\
00531 int16_t tmp[11*8], *tptr = tmp;\
00532 \
00533 r = (1<<(shift-1)) + rnd-1;\
00534 \
00535 src -= 1;\
00536 for(j = 0; j < 8; j++) {\
00537 for(i = 0; i < 11; i++)\
00538 tptr[i] = (vc1_mspel_ver_filter_16bits(src + i, stride, vmode)+r)>>shift;\
00539 src += stride;\
00540 tptr += 11;\
00541 }\
00542 \
00543 r = 64-rnd;\
00544 tptr = tmp+1;\
00545 for(j = 0; j < 8; j++) {\
00546 for(i = 0; i < 8; i++)\
00547 OP(dst[i], (vc1_mspel_hor_filter_16bits(tptr + i, 1, hmode)+r)>>7);\
00548 dst += stride;\
00549 tptr += 11;\
00550 }\
00551 \
00552 return;\
00553 }\
00554 else { \
00555 r = 1-rnd;\
00556 \
00557 for(j = 0; j < 8; j++) {\
00558 for(i = 0; i < 8; i++)\
00559 OP(dst[i], vc1_mspel_filter(src + i, stride, vmode, r));\
00560 src += stride;\
00561 dst += stride;\
00562 }\
00563 return;\
00564 }\
00565 }\
00566 \
00567 \
00568 for(j = 0; j < 8; j++) {\
00569 for(i = 0; i < 8; i++)\
00570 OP(dst[i], vc1_mspel_filter(src + i, 1, hmode, rnd));\
00571 dst += stride;\
00572 src += stride;\
00573 }\
00574 }
00575
00576 #define op_put(a, b) a = av_clip_uint8(b)
00577 #define op_avg(a, b) a = (a + av_clip_uint8(b) + 1) >> 1
00578
00579 VC1_MSPEL_MC(op_put, put_)
00580 VC1_MSPEL_MC(op_avg, avg_)
00581
00582
00583
00584 #define PUT_VC1_MSPEL(a, b)\
00585 static void put_vc1_mspel_mc ## a ## b ##_c(uint8_t *dst, const uint8_t *src, int stride, int rnd) { \
00586 put_vc1_mspel_mc(dst, src, stride, a, b, rnd); \
00587 }\
00588 static void avg_vc1_mspel_mc ## a ## b ##_c(uint8_t *dst, const uint8_t *src, int stride, int rnd) { \
00589 avg_vc1_mspel_mc(dst, src, stride, a, b, rnd); \
00590 }
00591
00592 PUT_VC1_MSPEL(1, 0)
00593 PUT_VC1_MSPEL(2, 0)
00594 PUT_VC1_MSPEL(3, 0)
00595
00596 PUT_VC1_MSPEL(0, 1)
00597 PUT_VC1_MSPEL(1, 1)
00598 PUT_VC1_MSPEL(2, 1)
00599 PUT_VC1_MSPEL(3, 1)
00600
00601 PUT_VC1_MSPEL(0, 2)
00602 PUT_VC1_MSPEL(1, 2)
00603 PUT_VC1_MSPEL(2, 2)
00604 PUT_VC1_MSPEL(3, 2)
00605
00606 PUT_VC1_MSPEL(0, 3)
00607 PUT_VC1_MSPEL(1, 3)
00608 PUT_VC1_MSPEL(2, 3)
00609 PUT_VC1_MSPEL(3, 3)
00610
00611 av_cold void ff_vc1dsp_init(DSPContext* dsp, AVCodecContext *avctx) {
00612 dsp->vc1_inv_trans_8x8 = vc1_inv_trans_8x8_c;
00613 dsp->vc1_inv_trans_4x8 = vc1_inv_trans_4x8_c;
00614 dsp->vc1_inv_trans_8x4 = vc1_inv_trans_8x4_c;
00615 dsp->vc1_inv_trans_4x4 = vc1_inv_trans_4x4_c;
00616 dsp->vc1_inv_trans_8x8_dc = vc1_inv_trans_8x8_dc_c;
00617 dsp->vc1_inv_trans_4x8_dc = vc1_inv_trans_4x8_dc_c;
00618 dsp->vc1_inv_trans_8x4_dc = vc1_inv_trans_8x4_dc_c;
00619 dsp->vc1_inv_trans_4x4_dc = vc1_inv_trans_4x4_dc_c;
00620 dsp->vc1_h_overlap = vc1_h_overlap_c;
00621 dsp->vc1_v_overlap = vc1_v_overlap_c;
00622 dsp->vc1_v_loop_filter4 = vc1_v_loop_filter4_c;
00623 dsp->vc1_h_loop_filter4 = vc1_h_loop_filter4_c;
00624 dsp->vc1_v_loop_filter8 = vc1_v_loop_filter8_c;
00625 dsp->vc1_h_loop_filter8 = vc1_h_loop_filter8_c;
00626 dsp->vc1_v_loop_filter16 = vc1_v_loop_filter16_c;
00627 dsp->vc1_h_loop_filter16 = vc1_h_loop_filter16_c;
00628
00629 dsp->put_vc1_mspel_pixels_tab[ 0] = ff_put_vc1_mspel_mc00_c;
00630 dsp->put_vc1_mspel_pixels_tab[ 1] = put_vc1_mspel_mc10_c;
00631 dsp->put_vc1_mspel_pixels_tab[ 2] = put_vc1_mspel_mc20_c;
00632 dsp->put_vc1_mspel_pixels_tab[ 3] = put_vc1_mspel_mc30_c;
00633 dsp->put_vc1_mspel_pixels_tab[ 4] = put_vc1_mspel_mc01_c;
00634 dsp->put_vc1_mspel_pixels_tab[ 5] = put_vc1_mspel_mc11_c;
00635 dsp->put_vc1_mspel_pixels_tab[ 6] = put_vc1_mspel_mc21_c;
00636 dsp->put_vc1_mspel_pixels_tab[ 7] = put_vc1_mspel_mc31_c;
00637 dsp->put_vc1_mspel_pixels_tab[ 8] = put_vc1_mspel_mc02_c;
00638 dsp->put_vc1_mspel_pixels_tab[ 9] = put_vc1_mspel_mc12_c;
00639 dsp->put_vc1_mspel_pixels_tab[10] = put_vc1_mspel_mc22_c;
00640 dsp->put_vc1_mspel_pixels_tab[11] = put_vc1_mspel_mc32_c;
00641 dsp->put_vc1_mspel_pixels_tab[12] = put_vc1_mspel_mc03_c;
00642 dsp->put_vc1_mspel_pixels_tab[13] = put_vc1_mspel_mc13_c;
00643 dsp->put_vc1_mspel_pixels_tab[14] = put_vc1_mspel_mc23_c;
00644 dsp->put_vc1_mspel_pixels_tab[15] = put_vc1_mspel_mc33_c;
00645
00646 dsp->avg_vc1_mspel_pixels_tab[ 0] = ff_avg_vc1_mspel_mc00_c;
00647 dsp->avg_vc1_mspel_pixels_tab[ 1] = avg_vc1_mspel_mc10_c;
00648 dsp->avg_vc1_mspel_pixels_tab[ 2] = avg_vc1_mspel_mc20_c;
00649 dsp->avg_vc1_mspel_pixels_tab[ 3] = avg_vc1_mspel_mc30_c;
00650 dsp->avg_vc1_mspel_pixels_tab[ 4] = avg_vc1_mspel_mc01_c;
00651 dsp->avg_vc1_mspel_pixels_tab[ 5] = avg_vc1_mspel_mc11_c;
00652 dsp->avg_vc1_mspel_pixels_tab[ 6] = avg_vc1_mspel_mc21_c;
00653 dsp->avg_vc1_mspel_pixels_tab[ 7] = avg_vc1_mspel_mc31_c;
00654 dsp->avg_vc1_mspel_pixels_tab[ 8] = avg_vc1_mspel_mc02_c;
00655 dsp->avg_vc1_mspel_pixels_tab[ 9] = avg_vc1_mspel_mc12_c;
00656 dsp->avg_vc1_mspel_pixels_tab[10] = avg_vc1_mspel_mc22_c;
00657 dsp->avg_vc1_mspel_pixels_tab[11] = avg_vc1_mspel_mc32_c;
00658 dsp->avg_vc1_mspel_pixels_tab[12] = avg_vc1_mspel_mc03_c;
00659 dsp->avg_vc1_mspel_pixels_tab[13] = avg_vc1_mspel_mc13_c;
00660 dsp->avg_vc1_mspel_pixels_tab[14] = avg_vc1_mspel_mc23_c;
00661 dsp->avg_vc1_mspel_pixels_tab[15] = avg_vc1_mspel_mc33_c;
00662 }