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00027 #include "libavutil/cpu.h"
00028 #include "libavutil/mem.h"
00029 #include "libavutil/x86/asm.h"
00030 #include "libavcodec/dsputil.h"
00031 #include "dsputil_mmx.h"
00032 #include "libavcodec/vc1dsp.h"
00033
00034 #if HAVE_INLINE_ASM
00035
00036 #define OP_PUT(S,D)
00037 #define OP_AVG(S,D) "pavgb " #S ", " #D " \n\t"
00038
00040 #define NORMALIZE_MMX(SHIFT) \
00041 "paddw %%mm7, %%mm3 \n\t" \
00042 "paddw %%mm7, %%mm4 \n\t" \
00043 "psraw "SHIFT", %%mm3 \n\t" \
00044 "psraw "SHIFT", %%mm4 \n\t"
00045
00046 #define TRANSFER_DO_PACK(OP) \
00047 "packuswb %%mm4, %%mm3 \n\t" \
00048 OP((%2), %%mm3) \
00049 "movq %%mm3, (%2) \n\t"
00050
00051 #define TRANSFER_DONT_PACK(OP) \
00052 OP(0(%2), %%mm3) \
00053 OP(8(%2), %%mm4) \
00054 "movq %%mm3, 0(%2) \n\t" \
00055 "movq %%mm4, 8(%2) \n\t"
00056
00058 #define DO_UNPACK(reg) "punpcklbw %%mm0, " reg "\n\t"
00059 #define DONT_UNPACK(reg)
00060
00062 #define LOAD_ROUNDER_MMX(ROUND) \
00063 "movd "ROUND", %%mm7 \n\t" \
00064 "punpcklwd %%mm7, %%mm7 \n\t" \
00065 "punpckldq %%mm7, %%mm7 \n\t"
00066
00067 #define SHIFT2_LINE(OFF, R0,R1,R2,R3) \
00068 "paddw %%mm"#R2", %%mm"#R1" \n\t" \
00069 "movd (%0,%3), %%mm"#R0" \n\t" \
00070 "pmullw %%mm6, %%mm"#R1" \n\t" \
00071 "punpcklbw %%mm0, %%mm"#R0" \n\t" \
00072 "movd (%0,%2), %%mm"#R3" \n\t" \
00073 "psubw %%mm"#R0", %%mm"#R1" \n\t" \
00074 "punpcklbw %%mm0, %%mm"#R3" \n\t" \
00075 "paddw %%mm7, %%mm"#R1" \n\t" \
00076 "psubw %%mm"#R3", %%mm"#R1" \n\t" \
00077 "psraw %4, %%mm"#R1" \n\t" \
00078 "movq %%mm"#R1", "#OFF"(%1) \n\t" \
00079 "add %2, %0 \n\t"
00080
00082 static void vc1_put_ver_16b_shift2_mmx(int16_t *dst,
00083 const uint8_t *src, x86_reg stride,
00084 int rnd, int64_t shift)
00085 {
00086 __asm__ volatile(
00087 "mov $3, %%"REG_c" \n\t"
00088 LOAD_ROUNDER_MMX("%5")
00089 "movq "MANGLE(ff_pw_9)", %%mm6 \n\t"
00090 "1: \n\t"
00091 "movd (%0), %%mm2 \n\t"
00092 "add %2, %0 \n\t"
00093 "movd (%0), %%mm3 \n\t"
00094 "punpcklbw %%mm0, %%mm2 \n\t"
00095 "punpcklbw %%mm0, %%mm3 \n\t"
00096 SHIFT2_LINE( 0, 1, 2, 3, 4)
00097 SHIFT2_LINE( 24, 2, 3, 4, 1)
00098 SHIFT2_LINE( 48, 3, 4, 1, 2)
00099 SHIFT2_LINE( 72, 4, 1, 2, 3)
00100 SHIFT2_LINE( 96, 1, 2, 3, 4)
00101 SHIFT2_LINE(120, 2, 3, 4, 1)
00102 SHIFT2_LINE(144, 3, 4, 1, 2)
00103 SHIFT2_LINE(168, 4, 1, 2, 3)
00104 "sub %6, %0 \n\t"
00105 "add $8, %1 \n\t"
00106 "dec %%"REG_c" \n\t"
00107 "jnz 1b \n\t"
00108 : "+r"(src), "+r"(dst)
00109 : "r"(stride), "r"(-2*stride),
00110 "m"(shift), "m"(rnd), "r"(9*stride-4)
00111 : "%"REG_c, "memory"
00112 );
00113 }
00114
00119 #define VC1_HOR_16b_SHIFT2(OP, OPNAME)\
00120 static void OPNAME ## vc1_hor_16b_shift2_mmx(uint8_t *dst, x86_reg stride,\
00121 const int16_t *src, int rnd)\
00122 {\
00123 int h = 8;\
00124 \
00125 src -= 1;\
00126 rnd -= (-1+9+9-1)*1024; \
00127 __asm__ volatile(\
00128 LOAD_ROUNDER_MMX("%4")\
00129 "movq "MANGLE(ff_pw_128)", %%mm6\n\t"\
00130 "movq "MANGLE(ff_pw_9)", %%mm5 \n\t"\
00131 "1: \n\t"\
00132 "movq 2*0+0(%1), %%mm1 \n\t"\
00133 "movq 2*0+8(%1), %%mm2 \n\t"\
00134 "movq 2*1+0(%1), %%mm3 \n\t"\
00135 "movq 2*1+8(%1), %%mm4 \n\t"\
00136 "paddw 2*3+0(%1), %%mm1 \n\t"\
00137 "paddw 2*3+8(%1), %%mm2 \n\t"\
00138 "paddw 2*2+0(%1), %%mm3 \n\t"\
00139 "paddw 2*2+8(%1), %%mm4 \n\t"\
00140 "pmullw %%mm5, %%mm3 \n\t"\
00141 "pmullw %%mm5, %%mm4 \n\t"\
00142 "psubw %%mm1, %%mm3 \n\t"\
00143 "psubw %%mm2, %%mm4 \n\t"\
00144 NORMALIZE_MMX("$7")\
00145 \
00146 "paddw %%mm6, %%mm3 \n\t"\
00147 "paddw %%mm6, %%mm4 \n\t"\
00148 TRANSFER_DO_PACK(OP)\
00149 "add $24, %1 \n\t"\
00150 "add %3, %2 \n\t"\
00151 "decl %0 \n\t"\
00152 "jnz 1b \n\t"\
00153 : "+r"(h), "+r" (src), "+r" (dst)\
00154 : "r"(stride), "m"(rnd)\
00155 : "memory"\
00156 );\
00157 }
00158
00159 VC1_HOR_16b_SHIFT2(OP_PUT, put_)
00160 VC1_HOR_16b_SHIFT2(OP_AVG, avg_)
00161
00162
00167 #define VC1_SHIFT2(OP, OPNAME)\
00168 static void OPNAME ## vc1_shift2_mmx(uint8_t *dst, const uint8_t *src,\
00169 x86_reg stride, int rnd, x86_reg offset)\
00170 {\
00171 rnd = 8-rnd;\
00172 __asm__ volatile(\
00173 "mov $8, %%"REG_c" \n\t"\
00174 LOAD_ROUNDER_MMX("%5")\
00175 "movq "MANGLE(ff_pw_9)", %%mm6\n\t"\
00176 "1: \n\t"\
00177 "movd 0(%0 ), %%mm3 \n\t"\
00178 "movd 4(%0 ), %%mm4 \n\t"\
00179 "movd 0(%0,%2), %%mm1 \n\t"\
00180 "movd 4(%0,%2), %%mm2 \n\t"\
00181 "add %2, %0 \n\t"\
00182 "punpcklbw %%mm0, %%mm3 \n\t"\
00183 "punpcklbw %%mm0, %%mm4 \n\t"\
00184 "punpcklbw %%mm0, %%mm1 \n\t"\
00185 "punpcklbw %%mm0, %%mm2 \n\t"\
00186 "paddw %%mm1, %%mm3 \n\t"\
00187 "paddw %%mm2, %%mm4 \n\t"\
00188 "movd 0(%0,%3), %%mm1 \n\t"\
00189 "movd 4(%0,%3), %%mm2 \n\t"\
00190 "pmullw %%mm6, %%mm3 \n\t" \
00191 "pmullw %%mm6, %%mm4 \n\t" \
00192 "punpcklbw %%mm0, %%mm1 \n\t"\
00193 "punpcklbw %%mm0, %%mm2 \n\t"\
00194 "psubw %%mm1, %%mm3 \n\t" \
00195 "psubw %%mm2, %%mm4 \n\t" \
00196 "movd 0(%0,%2), %%mm1 \n\t"\
00197 "movd 4(%0,%2), %%mm2 \n\t"\
00198 "punpcklbw %%mm0, %%mm1 \n\t"\
00199 "punpcklbw %%mm0, %%mm2 \n\t"\
00200 "psubw %%mm1, %%mm3 \n\t" \
00201 "psubw %%mm2, %%mm4 \n\t" \
00202 NORMALIZE_MMX("$4")\
00203 "packuswb %%mm4, %%mm3 \n\t"\
00204 OP((%1), %%mm3)\
00205 "movq %%mm3, (%1) \n\t"\
00206 "add %6, %0 \n\t"\
00207 "add %4, %1 \n\t"\
00208 "dec %%"REG_c" \n\t"\
00209 "jnz 1b \n\t"\
00210 : "+r"(src), "+r"(dst)\
00211 : "r"(offset), "r"(-2*offset), "g"(stride), "m"(rnd),\
00212 "g"(stride-offset)\
00213 : "%"REG_c, "memory"\
00214 );\
00215 }
00216
00217 VC1_SHIFT2(OP_PUT, put_)
00218 VC1_SHIFT2(OP_AVG, avg_)
00219
00230 #define MSPEL_FILTER13_CORE(UNPACK, MOVQ, A1, A2, A3, A4) \
00231 MOVQ "*0+"A1", %%mm1 \n\t" \
00232 MOVQ "*4+"A1", %%mm2 \n\t" \
00233 UNPACK("%%mm1") \
00234 UNPACK("%%mm2") \
00235 "pmullw "MANGLE(ff_pw_3)", %%mm1\n\t" \
00236 "pmullw "MANGLE(ff_pw_3)", %%mm2\n\t" \
00237 MOVQ "*0+"A2", %%mm3 \n\t" \
00238 MOVQ "*4+"A2", %%mm4 \n\t" \
00239 UNPACK("%%mm3") \
00240 UNPACK("%%mm4") \
00241 "pmullw %%mm6, %%mm3 \n\t" \
00242 "pmullw %%mm6, %%mm4 \n\t" \
00243 "psubw %%mm1, %%mm3 \n\t" \
00244 "psubw %%mm2, %%mm4 \n\t" \
00245 MOVQ "*0+"A4", %%mm1 \n\t" \
00246 MOVQ "*4+"A4", %%mm2 \n\t" \
00247 UNPACK("%%mm1") \
00248 UNPACK("%%mm2") \
00249 "psllw $2, %%mm1 \n\t" \
00250 "psllw $2, %%mm2 \n\t" \
00251 "psubw %%mm1, %%mm3 \n\t" \
00252 "psubw %%mm2, %%mm4 \n\t" \
00253 MOVQ "*0+"A3", %%mm1 \n\t" \
00254 MOVQ "*4+"A3", %%mm2 \n\t" \
00255 UNPACK("%%mm1") \
00256 UNPACK("%%mm2") \
00257 "pmullw %%mm5, %%mm1 \n\t" \
00258 "pmullw %%mm5, %%mm2 \n\t" \
00259 "paddw %%mm1, %%mm3 \n\t" \
00260 "paddw %%mm2, %%mm4 \n\t"
00261
00270 #define MSPEL_FILTER13_VER_16B(NAME, A1, A2, A3, A4) \
00271 static void \
00272 vc1_put_ver_16b_ ## NAME ## _mmx(int16_t *dst, const uint8_t *src, \
00273 x86_reg src_stride, \
00274 int rnd, int64_t shift) \
00275 { \
00276 int h = 8; \
00277 src -= src_stride; \
00278 __asm__ volatile( \
00279 LOAD_ROUNDER_MMX("%5") \
00280 "movq "MANGLE(ff_pw_53)", %%mm5\n\t" \
00281 "movq "MANGLE(ff_pw_18)", %%mm6\n\t" \
00282 ".p2align 3 \n\t" \
00283 "1: \n\t" \
00284 MSPEL_FILTER13_CORE(DO_UNPACK, "movd 1", A1, A2, A3, A4) \
00285 NORMALIZE_MMX("%6") \
00286 TRANSFER_DONT_PACK(OP_PUT) \
00287 \
00288 "movd 8+"A1", %%mm1 \n\t" \
00289 DO_UNPACK("%%mm1") \
00290 "movq %%mm1, %%mm3 \n\t" \
00291 "paddw %%mm1, %%mm1 \n\t" \
00292 "paddw %%mm3, %%mm1 \n\t" \
00293 "movd 8+"A2", %%mm3 \n\t" \
00294 DO_UNPACK("%%mm3") \
00295 "pmullw %%mm6, %%mm3 \n\t" \
00296 "psubw %%mm1, %%mm3 \n\t" \
00297 "movd 8+"A3", %%mm1 \n\t" \
00298 DO_UNPACK("%%mm1") \
00299 "pmullw %%mm5, %%mm1 \n\t" \
00300 "paddw %%mm1, %%mm3 \n\t" \
00301 "movd 8+"A4", %%mm1 \n\t" \
00302 DO_UNPACK("%%mm1") \
00303 "psllw $2, %%mm1 \n\t" \
00304 "psubw %%mm1, %%mm3 \n\t" \
00305 "paddw %%mm7, %%mm3 \n\t" \
00306 "psraw %6, %%mm3 \n\t" \
00307 "movq %%mm3, 16(%2) \n\t" \
00308 "add %3, %1 \n\t" \
00309 "add $24, %2 \n\t" \
00310 "decl %0 \n\t" \
00311 "jnz 1b \n\t" \
00312 : "+r"(h), "+r" (src), "+r" (dst) \
00313 : "r"(src_stride), "r"(3*src_stride), \
00314 "m"(rnd), "m"(shift) \
00315 : "memory" \
00316 ); \
00317 }
00318
00326 #define MSPEL_FILTER13_HOR_16B(NAME, A1, A2, A3, A4, OP, OPNAME) \
00327 static void \
00328 OPNAME ## vc1_hor_16b_ ## NAME ## _mmx(uint8_t *dst, x86_reg stride, \
00329 const int16_t *src, int rnd) \
00330 { \
00331 int h = 8; \
00332 src -= 1; \
00333 rnd -= (-4+58+13-3)*256; \
00334 __asm__ volatile( \
00335 LOAD_ROUNDER_MMX("%4") \
00336 "movq "MANGLE(ff_pw_18)", %%mm6 \n\t" \
00337 "movq "MANGLE(ff_pw_53)", %%mm5 \n\t" \
00338 ".p2align 3 \n\t" \
00339 "1: \n\t" \
00340 MSPEL_FILTER13_CORE(DONT_UNPACK, "movq 2", A1, A2, A3, A4) \
00341 NORMALIZE_MMX("$7") \
00342 \
00343 "paddw "MANGLE(ff_pw_128)", %%mm3 \n\t" \
00344 "paddw "MANGLE(ff_pw_128)", %%mm4 \n\t" \
00345 TRANSFER_DO_PACK(OP) \
00346 "add $24, %1 \n\t" \
00347 "add %3, %2 \n\t" \
00348 "decl %0 \n\t" \
00349 "jnz 1b \n\t" \
00350 : "+r"(h), "+r" (src), "+r" (dst) \
00351 : "r"(stride), "m"(rnd) \
00352 : "memory" \
00353 ); \
00354 }
00355
00364 #define MSPEL_FILTER13_8B(NAME, A1, A2, A3, A4, OP, OPNAME) \
00365 static void \
00366 OPNAME ## vc1_## NAME ## _mmx(uint8_t *dst, const uint8_t *src, \
00367 x86_reg stride, int rnd, x86_reg offset) \
00368 { \
00369 int h = 8; \
00370 src -= offset; \
00371 rnd = 32-rnd; \
00372 __asm__ volatile ( \
00373 LOAD_ROUNDER_MMX("%6") \
00374 "movq "MANGLE(ff_pw_53)", %%mm5 \n\t" \
00375 "movq "MANGLE(ff_pw_18)", %%mm6 \n\t" \
00376 ".p2align 3 \n\t" \
00377 "1: \n\t" \
00378 MSPEL_FILTER13_CORE(DO_UNPACK, "movd 1", A1, A2, A3, A4) \
00379 NORMALIZE_MMX("$6") \
00380 TRANSFER_DO_PACK(OP) \
00381 "add %5, %1 \n\t" \
00382 "add %5, %2 \n\t" \
00383 "decl %0 \n\t" \
00384 "jnz 1b \n\t" \
00385 : "+r"(h), "+r" (src), "+r" (dst) \
00386 : "r"(offset), "r"(3*offset), "g"(stride), "m"(rnd) \
00387 : "memory" \
00388 ); \
00389 }
00390
00392 MSPEL_FILTER13_8B (shift1, "0(%1,%4 )", "0(%1,%3,2)", "0(%1,%3 )", "0(%1 )", OP_PUT, put_)
00393 MSPEL_FILTER13_8B (shift1, "0(%1,%4 )", "0(%1,%3,2)", "0(%1,%3 )", "0(%1 )", OP_AVG, avg_)
00394 MSPEL_FILTER13_VER_16B(shift1, "0(%1,%4 )", "0(%1,%3,2)", "0(%1,%3 )", "0(%1 )")
00395 MSPEL_FILTER13_HOR_16B(shift1, "2*3(%1)", "2*2(%1)", "2*1(%1)", "2*0(%1)", OP_PUT, put_)
00396 MSPEL_FILTER13_HOR_16B(shift1, "2*3(%1)", "2*2(%1)", "2*1(%1)", "2*0(%1)", OP_AVG, avg_)
00397
00399 MSPEL_FILTER13_8B (shift3, "0(%1 )", "0(%1,%3 )", "0(%1,%3,2)", "0(%1,%4 )", OP_PUT, put_)
00400 MSPEL_FILTER13_8B (shift3, "0(%1 )", "0(%1,%3 )", "0(%1,%3,2)", "0(%1,%4 )", OP_AVG, avg_)
00401 MSPEL_FILTER13_VER_16B(shift3, "0(%1 )", "0(%1,%3 )", "0(%1,%3,2)", "0(%1,%4 )")
00402 MSPEL_FILTER13_HOR_16B(shift3, "2*0(%1)", "2*1(%1)", "2*2(%1)", "2*3(%1)", OP_PUT, put_)
00403 MSPEL_FILTER13_HOR_16B(shift3, "2*0(%1)", "2*1(%1)", "2*2(%1)", "2*3(%1)", OP_AVG, avg_)
00404
00405 typedef void (*vc1_mspel_mc_filter_ver_16bits)(int16_t *dst, const uint8_t *src, x86_reg src_stride, int rnd, int64_t shift);
00406 typedef void (*vc1_mspel_mc_filter_hor_16bits)(uint8_t *dst, x86_reg dst_stride, const int16_t *src, int rnd);
00407 typedef void (*vc1_mspel_mc_filter_8bits)(uint8_t *dst, const uint8_t *src, x86_reg stride, int rnd, x86_reg offset);
00408
00420 #define VC1_MSPEL_MC(OP)\
00421 static void OP ## vc1_mspel_mc(uint8_t *dst, const uint8_t *src, int stride,\
00422 int hmode, int vmode, int rnd)\
00423 {\
00424 static const vc1_mspel_mc_filter_ver_16bits vc1_put_shift_ver_16bits[] =\
00425 { NULL, vc1_put_ver_16b_shift1_mmx, vc1_put_ver_16b_shift2_mmx, vc1_put_ver_16b_shift3_mmx };\
00426 static const vc1_mspel_mc_filter_hor_16bits vc1_put_shift_hor_16bits[] =\
00427 { NULL, OP ## vc1_hor_16b_shift1_mmx, OP ## vc1_hor_16b_shift2_mmx, OP ## vc1_hor_16b_shift3_mmx };\
00428 static const vc1_mspel_mc_filter_8bits vc1_put_shift_8bits[] =\
00429 { NULL, OP ## vc1_shift1_mmx, OP ## vc1_shift2_mmx, OP ## vc1_shift3_mmx };\
00430 \
00431 __asm__ volatile(\
00432 "pxor %%mm0, %%mm0 \n\t"\
00433 ::: "memory"\
00434 );\
00435 \
00436 if (vmode) { \
00437 if (hmode) { \
00438 static const int shift_value[] = { 0, 5, 1, 5 };\
00439 int shift = (shift_value[hmode]+shift_value[vmode])>>1;\
00440 int r;\
00441 DECLARE_ALIGNED(16, int16_t, tmp)[12*8];\
00442 \
00443 r = (1<<(shift-1)) + rnd-1;\
00444 vc1_put_shift_ver_16bits[vmode](tmp, src-1, stride, r, shift);\
00445 \
00446 vc1_put_shift_hor_16bits[hmode](dst, stride, tmp+1, 64-rnd);\
00447 return;\
00448 }\
00449 else { \
00450 vc1_put_shift_8bits[vmode](dst, src, stride, 1-rnd, stride);\
00451 return;\
00452 }\
00453 }\
00454 \
00455 \
00456 vc1_put_shift_8bits[hmode](dst, src, stride, rnd, 1);\
00457 }
00458
00459 VC1_MSPEL_MC(put_)
00460 VC1_MSPEL_MC(avg_)
00461
00463 #define DECLARE_FUNCTION(a, b) \
00464 static void put_vc1_mspel_mc ## a ## b ## _mmx(uint8_t *dst, const uint8_t *src, int stride, int rnd) { \
00465 put_vc1_mspel_mc(dst, src, stride, a, b, rnd); \
00466 }\
00467 static void avg_vc1_mspel_mc ## a ## b ## _mmx2(uint8_t *dst, const uint8_t *src, int stride, int rnd) { \
00468 avg_vc1_mspel_mc(dst, src, stride, a, b, rnd); \
00469 }
00470
00471 DECLARE_FUNCTION(0, 1)
00472 DECLARE_FUNCTION(0, 2)
00473 DECLARE_FUNCTION(0, 3)
00474
00475 DECLARE_FUNCTION(1, 0)
00476 DECLARE_FUNCTION(1, 1)
00477 DECLARE_FUNCTION(1, 2)
00478 DECLARE_FUNCTION(1, 3)
00479
00480 DECLARE_FUNCTION(2, 0)
00481 DECLARE_FUNCTION(2, 1)
00482 DECLARE_FUNCTION(2, 2)
00483 DECLARE_FUNCTION(2, 3)
00484
00485 DECLARE_FUNCTION(3, 0)
00486 DECLARE_FUNCTION(3, 1)
00487 DECLARE_FUNCTION(3, 2)
00488 DECLARE_FUNCTION(3, 3)
00489
00490 static void vc1_inv_trans_4x4_dc_mmx2(uint8_t *dest, int linesize, DCTELEM *block)
00491 {
00492 int dc = block[0];
00493 dc = (17 * dc + 4) >> 3;
00494 dc = (17 * dc + 64) >> 7;
00495 __asm__ volatile(
00496 "movd %0, %%mm0 \n\t"
00497 "pshufw $0, %%mm0, %%mm0 \n\t"
00498 "pxor %%mm1, %%mm1 \n\t"
00499 "psubw %%mm0, %%mm1 \n\t"
00500 "packuswb %%mm0, %%mm0 \n\t"
00501 "packuswb %%mm1, %%mm1 \n\t"
00502 ::"r"(dc)
00503 );
00504 __asm__ volatile(
00505 "movd %0, %%mm2 \n\t"
00506 "movd %1, %%mm3 \n\t"
00507 "movd %2, %%mm4 \n\t"
00508 "movd %3, %%mm5 \n\t"
00509 "paddusb %%mm0, %%mm2 \n\t"
00510 "paddusb %%mm0, %%mm3 \n\t"
00511 "paddusb %%mm0, %%mm4 \n\t"
00512 "paddusb %%mm0, %%mm5 \n\t"
00513 "psubusb %%mm1, %%mm2 \n\t"
00514 "psubusb %%mm1, %%mm3 \n\t"
00515 "psubusb %%mm1, %%mm4 \n\t"
00516 "psubusb %%mm1, %%mm5 \n\t"
00517 "movd %%mm2, %0 \n\t"
00518 "movd %%mm3, %1 \n\t"
00519 "movd %%mm4, %2 \n\t"
00520 "movd %%mm5, %3 \n\t"
00521 :"+m"(*(uint32_t*)(dest+0*linesize)),
00522 "+m"(*(uint32_t*)(dest+1*linesize)),
00523 "+m"(*(uint32_t*)(dest+2*linesize)),
00524 "+m"(*(uint32_t*)(dest+3*linesize))
00525 );
00526 }
00527
00528 static void vc1_inv_trans_4x8_dc_mmx2(uint8_t *dest, int linesize, DCTELEM *block)
00529 {
00530 int dc = block[0];
00531 dc = (17 * dc + 4) >> 3;
00532 dc = (12 * dc + 64) >> 7;
00533 __asm__ volatile(
00534 "movd %0, %%mm0 \n\t"
00535 "pshufw $0, %%mm0, %%mm0 \n\t"
00536 "pxor %%mm1, %%mm1 \n\t"
00537 "psubw %%mm0, %%mm1 \n\t"
00538 "packuswb %%mm0, %%mm0 \n\t"
00539 "packuswb %%mm1, %%mm1 \n\t"
00540 ::"r"(dc)
00541 );
00542 __asm__ volatile(
00543 "movd %0, %%mm2 \n\t"
00544 "movd %1, %%mm3 \n\t"
00545 "movd %2, %%mm4 \n\t"
00546 "movd %3, %%mm5 \n\t"
00547 "paddusb %%mm0, %%mm2 \n\t"
00548 "paddusb %%mm0, %%mm3 \n\t"
00549 "paddusb %%mm0, %%mm4 \n\t"
00550 "paddusb %%mm0, %%mm5 \n\t"
00551 "psubusb %%mm1, %%mm2 \n\t"
00552 "psubusb %%mm1, %%mm3 \n\t"
00553 "psubusb %%mm1, %%mm4 \n\t"
00554 "psubusb %%mm1, %%mm5 \n\t"
00555 "movd %%mm2, %0 \n\t"
00556 "movd %%mm3, %1 \n\t"
00557 "movd %%mm4, %2 \n\t"
00558 "movd %%mm5, %3 \n\t"
00559 :"+m"(*(uint32_t*)(dest+0*linesize)),
00560 "+m"(*(uint32_t*)(dest+1*linesize)),
00561 "+m"(*(uint32_t*)(dest+2*linesize)),
00562 "+m"(*(uint32_t*)(dest+3*linesize))
00563 );
00564 dest += 4*linesize;
00565 __asm__ volatile(
00566 "movd %0, %%mm2 \n\t"
00567 "movd %1, %%mm3 \n\t"
00568 "movd %2, %%mm4 \n\t"
00569 "movd %3, %%mm5 \n\t"
00570 "paddusb %%mm0, %%mm2 \n\t"
00571 "paddusb %%mm0, %%mm3 \n\t"
00572 "paddusb %%mm0, %%mm4 \n\t"
00573 "paddusb %%mm0, %%mm5 \n\t"
00574 "psubusb %%mm1, %%mm2 \n\t"
00575 "psubusb %%mm1, %%mm3 \n\t"
00576 "psubusb %%mm1, %%mm4 \n\t"
00577 "psubusb %%mm1, %%mm5 \n\t"
00578 "movd %%mm2, %0 \n\t"
00579 "movd %%mm3, %1 \n\t"
00580 "movd %%mm4, %2 \n\t"
00581 "movd %%mm5, %3 \n\t"
00582 :"+m"(*(uint32_t*)(dest+0*linesize)),
00583 "+m"(*(uint32_t*)(dest+1*linesize)),
00584 "+m"(*(uint32_t*)(dest+2*linesize)),
00585 "+m"(*(uint32_t*)(dest+3*linesize))
00586 );
00587 }
00588
00589 static void vc1_inv_trans_8x4_dc_mmx2(uint8_t *dest, int linesize, DCTELEM *block)
00590 {
00591 int dc = block[0];
00592 dc = ( 3 * dc + 1) >> 1;
00593 dc = (17 * dc + 64) >> 7;
00594 __asm__ volatile(
00595 "movd %0, %%mm0 \n\t"
00596 "pshufw $0, %%mm0, %%mm0 \n\t"
00597 "pxor %%mm1, %%mm1 \n\t"
00598 "psubw %%mm0, %%mm1 \n\t"
00599 "packuswb %%mm0, %%mm0 \n\t"
00600 "packuswb %%mm1, %%mm1 \n\t"
00601 ::"r"(dc)
00602 );
00603 __asm__ volatile(
00604 "movq %0, %%mm2 \n\t"
00605 "movq %1, %%mm3 \n\t"
00606 "movq %2, %%mm4 \n\t"
00607 "movq %3, %%mm5 \n\t"
00608 "paddusb %%mm0, %%mm2 \n\t"
00609 "paddusb %%mm0, %%mm3 \n\t"
00610 "paddusb %%mm0, %%mm4 \n\t"
00611 "paddusb %%mm0, %%mm5 \n\t"
00612 "psubusb %%mm1, %%mm2 \n\t"
00613 "psubusb %%mm1, %%mm3 \n\t"
00614 "psubusb %%mm1, %%mm4 \n\t"
00615 "psubusb %%mm1, %%mm5 \n\t"
00616 "movq %%mm2, %0 \n\t"
00617 "movq %%mm3, %1 \n\t"
00618 "movq %%mm4, %2 \n\t"
00619 "movq %%mm5, %3 \n\t"
00620 :"+m"(*(uint32_t*)(dest+0*linesize)),
00621 "+m"(*(uint32_t*)(dest+1*linesize)),
00622 "+m"(*(uint32_t*)(dest+2*linesize)),
00623 "+m"(*(uint32_t*)(dest+3*linesize))
00624 );
00625 }
00626
00627 static void vc1_inv_trans_8x8_dc_mmx2(uint8_t *dest, int linesize, DCTELEM *block)
00628 {
00629 int dc = block[0];
00630 dc = (3 * dc + 1) >> 1;
00631 dc = (3 * dc + 16) >> 5;
00632 __asm__ volatile(
00633 "movd %0, %%mm0 \n\t"
00634 "pshufw $0, %%mm0, %%mm0 \n\t"
00635 "pxor %%mm1, %%mm1 \n\t"
00636 "psubw %%mm0, %%mm1 \n\t"
00637 "packuswb %%mm0, %%mm0 \n\t"
00638 "packuswb %%mm1, %%mm1 \n\t"
00639 ::"r"(dc)
00640 );
00641 __asm__ volatile(
00642 "movq %0, %%mm2 \n\t"
00643 "movq %1, %%mm3 \n\t"
00644 "movq %2, %%mm4 \n\t"
00645 "movq %3, %%mm5 \n\t"
00646 "paddusb %%mm0, %%mm2 \n\t"
00647 "paddusb %%mm0, %%mm3 \n\t"
00648 "paddusb %%mm0, %%mm4 \n\t"
00649 "paddusb %%mm0, %%mm5 \n\t"
00650 "psubusb %%mm1, %%mm2 \n\t"
00651 "psubusb %%mm1, %%mm3 \n\t"
00652 "psubusb %%mm1, %%mm4 \n\t"
00653 "psubusb %%mm1, %%mm5 \n\t"
00654 "movq %%mm2, %0 \n\t"
00655 "movq %%mm3, %1 \n\t"
00656 "movq %%mm4, %2 \n\t"
00657 "movq %%mm5, %3 \n\t"
00658 :"+m"(*(uint32_t*)(dest+0*linesize)),
00659 "+m"(*(uint32_t*)(dest+1*linesize)),
00660 "+m"(*(uint32_t*)(dest+2*linesize)),
00661 "+m"(*(uint32_t*)(dest+3*linesize))
00662 );
00663 dest += 4*linesize;
00664 __asm__ volatile(
00665 "movq %0, %%mm2 \n\t"
00666 "movq %1, %%mm3 \n\t"
00667 "movq %2, %%mm4 \n\t"
00668 "movq %3, %%mm5 \n\t"
00669 "paddusb %%mm0, %%mm2 \n\t"
00670 "paddusb %%mm0, %%mm3 \n\t"
00671 "paddusb %%mm0, %%mm4 \n\t"
00672 "paddusb %%mm0, %%mm5 \n\t"
00673 "psubusb %%mm1, %%mm2 \n\t"
00674 "psubusb %%mm1, %%mm3 \n\t"
00675 "psubusb %%mm1, %%mm4 \n\t"
00676 "psubusb %%mm1, %%mm5 \n\t"
00677 "movq %%mm2, %0 \n\t"
00678 "movq %%mm3, %1 \n\t"
00679 "movq %%mm4, %2 \n\t"
00680 "movq %%mm5, %3 \n\t"
00681 :"+m"(*(uint32_t*)(dest+0*linesize)),
00682 "+m"(*(uint32_t*)(dest+1*linesize)),
00683 "+m"(*(uint32_t*)(dest+2*linesize)),
00684 "+m"(*(uint32_t*)(dest+3*linesize))
00685 );
00686 }
00687
00688 #endif
00689
00690 #define LOOP_FILTER(EXT) \
00691 void ff_vc1_v_loop_filter4_ ## EXT(uint8_t *src, int stride, int pq); \
00692 void ff_vc1_h_loop_filter4_ ## EXT(uint8_t *src, int stride, int pq); \
00693 void ff_vc1_v_loop_filter8_ ## EXT(uint8_t *src, int stride, int pq); \
00694 void ff_vc1_h_loop_filter8_ ## EXT(uint8_t *src, int stride, int pq); \
00695 \
00696 static void vc1_v_loop_filter16_ ## EXT(uint8_t *src, int stride, int pq) \
00697 { \
00698 ff_vc1_v_loop_filter8_ ## EXT(src, stride, pq); \
00699 ff_vc1_v_loop_filter8_ ## EXT(src+8, stride, pq); \
00700 } \
00701 \
00702 static void vc1_h_loop_filter16_ ## EXT(uint8_t *src, int stride, int pq) \
00703 { \
00704 ff_vc1_h_loop_filter8_ ## EXT(src, stride, pq); \
00705 ff_vc1_h_loop_filter8_ ## EXT(src+8*stride, stride, pq); \
00706 }
00707
00708 #if HAVE_YASM
00709 LOOP_FILTER(mmx2)
00710 LOOP_FILTER(sse2)
00711 LOOP_FILTER(ssse3)
00712
00713 void ff_vc1_h_loop_filter8_sse4(uint8_t *src, int stride, int pq);
00714
00715 static void vc1_h_loop_filter16_sse4(uint8_t *src, int stride, int pq)
00716 {
00717 ff_vc1_h_loop_filter8_sse4(src, stride, pq);
00718 ff_vc1_h_loop_filter8_sse4(src+8*stride, stride, pq);
00719 }
00720 #endif
00721
00722 void ff_put_vc1_chroma_mc8_mmx_nornd (uint8_t *dst, uint8_t *src,
00723 int stride, int h, int x, int y);
00724 void ff_avg_vc1_chroma_mc8_mmx2_nornd (uint8_t *dst, uint8_t *src,
00725 int stride, int h, int x, int y);
00726 void ff_avg_vc1_chroma_mc8_3dnow_nornd(uint8_t *dst, uint8_t *src,
00727 int stride, int h, int x, int y);
00728 void ff_put_vc1_chroma_mc8_ssse3_nornd(uint8_t *dst, uint8_t *src,
00729 int stride, int h, int x, int y);
00730 void ff_avg_vc1_chroma_mc8_ssse3_nornd(uint8_t *dst, uint8_t *src,
00731 int stride, int h, int x, int y);
00732
00733 void ff_vc1dsp_init_mmx(VC1DSPContext *dsp)
00734 {
00735 int mm_flags = av_get_cpu_flags();
00736
00737 #if HAVE_INLINE_ASM
00738 if (mm_flags & AV_CPU_FLAG_MMX) {
00739 dsp->put_vc1_mspel_pixels_tab[ 0] = ff_put_vc1_mspel_mc00_mmx;
00740 dsp->put_vc1_mspel_pixels_tab[ 4] = put_vc1_mspel_mc01_mmx;
00741 dsp->put_vc1_mspel_pixels_tab[ 8] = put_vc1_mspel_mc02_mmx;
00742 dsp->put_vc1_mspel_pixels_tab[12] = put_vc1_mspel_mc03_mmx;
00743
00744 dsp->put_vc1_mspel_pixels_tab[ 1] = put_vc1_mspel_mc10_mmx;
00745 dsp->put_vc1_mspel_pixels_tab[ 5] = put_vc1_mspel_mc11_mmx;
00746 dsp->put_vc1_mspel_pixels_tab[ 9] = put_vc1_mspel_mc12_mmx;
00747 dsp->put_vc1_mspel_pixels_tab[13] = put_vc1_mspel_mc13_mmx;
00748
00749 dsp->put_vc1_mspel_pixels_tab[ 2] = put_vc1_mspel_mc20_mmx;
00750 dsp->put_vc1_mspel_pixels_tab[ 6] = put_vc1_mspel_mc21_mmx;
00751 dsp->put_vc1_mspel_pixels_tab[10] = put_vc1_mspel_mc22_mmx;
00752 dsp->put_vc1_mspel_pixels_tab[14] = put_vc1_mspel_mc23_mmx;
00753
00754 dsp->put_vc1_mspel_pixels_tab[ 3] = put_vc1_mspel_mc30_mmx;
00755 dsp->put_vc1_mspel_pixels_tab[ 7] = put_vc1_mspel_mc31_mmx;
00756 dsp->put_vc1_mspel_pixels_tab[11] = put_vc1_mspel_mc32_mmx;
00757 dsp->put_vc1_mspel_pixels_tab[15] = put_vc1_mspel_mc33_mmx;
00758
00759 if (HAVE_YASM)
00760 dsp->put_no_rnd_vc1_chroma_pixels_tab[0]= ff_put_vc1_chroma_mc8_mmx_nornd;
00761 }
00762
00763 if (mm_flags & AV_CPU_FLAG_MMXEXT) {
00764 dsp->avg_vc1_mspel_pixels_tab[ 0] = ff_avg_vc1_mspel_mc00_mmx2;
00765 dsp->avg_vc1_mspel_pixels_tab[ 4] = avg_vc1_mspel_mc01_mmx2;
00766 dsp->avg_vc1_mspel_pixels_tab[ 8] = avg_vc1_mspel_mc02_mmx2;
00767 dsp->avg_vc1_mspel_pixels_tab[12] = avg_vc1_mspel_mc03_mmx2;
00768
00769 dsp->avg_vc1_mspel_pixels_tab[ 1] = avg_vc1_mspel_mc10_mmx2;
00770 dsp->avg_vc1_mspel_pixels_tab[ 5] = avg_vc1_mspel_mc11_mmx2;
00771 dsp->avg_vc1_mspel_pixels_tab[ 9] = avg_vc1_mspel_mc12_mmx2;
00772 dsp->avg_vc1_mspel_pixels_tab[13] = avg_vc1_mspel_mc13_mmx2;
00773
00774 dsp->avg_vc1_mspel_pixels_tab[ 2] = avg_vc1_mspel_mc20_mmx2;
00775 dsp->avg_vc1_mspel_pixels_tab[ 6] = avg_vc1_mspel_mc21_mmx2;
00776 dsp->avg_vc1_mspel_pixels_tab[10] = avg_vc1_mspel_mc22_mmx2;
00777 dsp->avg_vc1_mspel_pixels_tab[14] = avg_vc1_mspel_mc23_mmx2;
00778
00779 dsp->avg_vc1_mspel_pixels_tab[ 3] = avg_vc1_mspel_mc30_mmx2;
00780 dsp->avg_vc1_mspel_pixels_tab[ 7] = avg_vc1_mspel_mc31_mmx2;
00781 dsp->avg_vc1_mspel_pixels_tab[11] = avg_vc1_mspel_mc32_mmx2;
00782 dsp->avg_vc1_mspel_pixels_tab[15] = avg_vc1_mspel_mc33_mmx2;
00783
00784 dsp->vc1_inv_trans_8x8_dc = vc1_inv_trans_8x8_dc_mmx2;
00785 dsp->vc1_inv_trans_4x8_dc = vc1_inv_trans_4x8_dc_mmx2;
00786 dsp->vc1_inv_trans_8x4_dc = vc1_inv_trans_8x4_dc_mmx2;
00787 dsp->vc1_inv_trans_4x4_dc = vc1_inv_trans_4x4_dc_mmx2;
00788
00789 if (HAVE_YASM)
00790 dsp->avg_no_rnd_vc1_chroma_pixels_tab[0]= ff_avg_vc1_chroma_mc8_mmx2_nornd;
00791 } else if (HAVE_YASM && mm_flags & AV_CPU_FLAG_3DNOW) {
00792 dsp->avg_no_rnd_vc1_chroma_pixels_tab[0]= ff_avg_vc1_chroma_mc8_3dnow_nornd;
00793 }
00794
00795 if (HAVE_YASM && mm_flags & AV_CPU_FLAG_SSSE3) {
00796 dsp->put_no_rnd_vc1_chroma_pixels_tab[0]= ff_put_vc1_chroma_mc8_ssse3_nornd;
00797 dsp->avg_no_rnd_vc1_chroma_pixels_tab[0]= ff_avg_vc1_chroma_mc8_ssse3_nornd;
00798 }
00799 #endif
00800
00801 #define ASSIGN_LF(EXT) \
00802 dsp->vc1_v_loop_filter4 = ff_vc1_v_loop_filter4_ ## EXT; \
00803 dsp->vc1_h_loop_filter4 = ff_vc1_h_loop_filter4_ ## EXT; \
00804 dsp->vc1_v_loop_filter8 = ff_vc1_v_loop_filter8_ ## EXT; \
00805 dsp->vc1_h_loop_filter8 = ff_vc1_h_loop_filter8_ ## EXT; \
00806 dsp->vc1_v_loop_filter16 = vc1_v_loop_filter16_ ## EXT; \
00807 dsp->vc1_h_loop_filter16 = vc1_h_loop_filter16_ ## EXT
00808
00809 #if HAVE_YASM
00810 if (mm_flags & AV_CPU_FLAG_MMX) {
00811 }
00812
00813 if (mm_flags & AV_CPU_FLAG_MMXEXT) {
00814 ASSIGN_LF(mmx2);
00815 }
00816
00817 if (mm_flags & AV_CPU_FLAG_SSE2) {
00818 dsp->vc1_v_loop_filter8 = ff_vc1_v_loop_filter8_sse2;
00819 dsp->vc1_h_loop_filter8 = ff_vc1_h_loop_filter8_sse2;
00820 dsp->vc1_v_loop_filter16 = vc1_v_loop_filter16_sse2;
00821 dsp->vc1_h_loop_filter16 = vc1_h_loop_filter16_sse2;
00822 }
00823 if (mm_flags & AV_CPU_FLAG_SSSE3) {
00824 ASSIGN_LF(ssse3);
00825 }
00826 if (mm_flags & AV_CPU_FLAG_SSE4) {
00827 dsp->vc1_h_loop_filter8 = ff_vc1_h_loop_filter8_sse4;
00828 dsp->vc1_h_loop_filter16 = vc1_h_loop_filter16_sse4;
00829 }
00830 #endif
00831 }