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aacdec_mips.h
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1 /*
2  * Copyright (c) 2012
3  * MIPS Technologies, Inc., California.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  * notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  * notice, this list of conditions and the following disclaimer in the
12  * documentation and/or other materials provided with the distribution.
13  * 3. Neither the name of the MIPS Technologies, Inc., nor the names of its
14  * contributors may be used to endorse or promote products derived from
15  * this software without specific prior written permission.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE MIPS TECHNOLOGIES, INC. ``AS IS'' AND
18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20  * ARE DISCLAIMED. IN NO EVENT SHALL THE MIPS TECHNOLOGIES, INC. BE LIABLE
21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27  * SUCH DAMAGE.
28  *
29  * Authors: Darko Laus (darko@mips.com)
30  * Djordje Pesut (djordje@mips.com)
31  * Mirjana Vulin (mvulin@mips.com)
32  *
33  * AAC Spectral Band Replication decoding functions optimized for MIPS
34  *
35  * This file is part of FFmpeg.
36  *
37  * FFmpeg is free software; you can redistribute it and/or
38  * modify it under the terms of the GNU Lesser General Public
39  * License as published by the Free Software Foundation; either
40  * version 2.1 of the License, or (at your option) any later version.
41  *
42  * FFmpeg is distributed in the hope that it will be useful,
43  * but WITHOUT ANY WARRANTY; without even the implied warranty of
44  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
45  * Lesser General Public License for more details.
46  *
47  * You should have received a copy of the GNU Lesser General Public
48  * License along with FFmpeg; if not, write to the Free Software
49  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
50  */
51 
52 /**
53  * @file
54  * Reference: libavcodec/aacdec.c
55  */
56 
57 #ifndef AVCODEC_MIPS_AACDEC_FLOAT_H
58 #define AVCODEC_MIPS_AACDEC_FLOAT_H
59 
60 #include "libavcodec/aac.h"
61 
62 #if HAVE_INLINE_ASM && HAVE_MIPSFPU
63 static inline float *VMUL2_mips(float *dst, const float *v, unsigned idx,
64  const float *scale)
65 {
66  float temp0, temp1, temp2;
67  int temp3, temp4;
68  float *ret;
69 
70  __asm__ volatile(
71  "andi %[temp3], %[idx], 15 \n\t"
72  "ext %[temp4], %[idx], 4, 4 \n\t"
73  "sll %[temp3], %[temp3], 2 \n\t"
74  "sll %[temp4], %[temp4], 2 \n\t"
75  "lwc1 %[temp2], 0(%[scale]) \n\t"
76  "lwxc1 %[temp0], %[temp3](%[v]) \n\t"
77  "lwxc1 %[temp1], %[temp4](%[v]) \n\t"
78  "mul.s %[temp0], %[temp0], %[temp2] \n\t"
79  "mul.s %[temp1], %[temp1], %[temp2] \n\t"
80  "addiu %[ret], %[dst], 8 \n\t"
81  "swc1 %[temp0], 0(%[dst]) \n\t"
82  "swc1 %[temp1], 4(%[dst]) \n\t"
83 
84  : [temp0]"=&f"(temp0), [temp1]"=&f"(temp1),
85  [temp2]"=&f"(temp2), [temp3]"=&r"(temp3),
86  [temp4]"=&r"(temp4), [ret]"=&r"(ret)
87  : [idx]"r"(idx), [scale]"r"(scale), [v]"r"(v),
88  [dst]"r"(dst)
89  : "memory"
90  );
91  return ret;
92 }
93 
94 static inline float *VMUL4_mips(float *dst, const float *v, unsigned idx,
95  const float *scale)
96 {
97  int temp0, temp1, temp2, temp3;
98  float temp4, temp5, temp6, temp7, temp8;
99  float *ret;
100 
101  __asm__ volatile(
102  "andi %[temp0], %[idx], 3 \n\t"
103  "ext %[temp1], %[idx], 2, 2 \n\t"
104  "ext %[temp2], %[idx], 4, 2 \n\t"
105  "ext %[temp3], %[idx], 6, 2 \n\t"
106  "sll %[temp0], %[temp0], 2 \n\t"
107  "sll %[temp1], %[temp1], 2 \n\t"
108  "sll %[temp2], %[temp2], 2 \n\t"
109  "sll %[temp3], %[temp3], 2 \n\t"
110  "lwc1 %[temp4], 0(%[scale]) \n\t"
111  "lwxc1 %[temp5], %[temp0](%[v]) \n\t"
112  "lwxc1 %[temp6], %[temp1](%[v]) \n\t"
113  "lwxc1 %[temp7], %[temp2](%[v]) \n\t"
114  "lwxc1 %[temp8], %[temp3](%[v]) \n\t"
115  "mul.s %[temp5], %[temp5], %[temp4] \n\t"
116  "mul.s %[temp6], %[temp6], %[temp4] \n\t"
117  "mul.s %[temp7], %[temp7], %[temp4] \n\t"
118  "mul.s %[temp8], %[temp8], %[temp4] \n\t"
119  "addiu %[ret], %[dst], 16 \n\t"
120  "swc1 %[temp5], 0(%[dst]) \n\t"
121  "swc1 %[temp6], 4(%[dst]) \n\t"
122  "swc1 %[temp7], 8(%[dst]) \n\t"
123  "swc1 %[temp8], 12(%[dst]) \n\t"
124 
125  : [temp0]"=&r"(temp0), [temp1]"=&r"(temp1),
126  [temp2]"=&r"(temp2), [temp3]"=&r"(temp3),
127  [temp4]"=&f"(temp4), [temp5]"=&f"(temp5),
128  [temp6]"=&f"(temp6), [temp7]"=&f"(temp7),
129  [temp8]"=&f"(temp8), [ret]"=&r"(ret)
130  : [idx]"r"(idx), [scale]"r"(scale), [v]"r"(v),
131  [dst]"r"(dst)
132  : "memory"
133  );
134  return ret;
135 }
136 
137 static inline float *VMUL2S_mips(float *dst, const float *v, unsigned idx,
138  unsigned sign, const float *scale)
139 {
140  int temp0, temp1, temp2, temp3, temp4, temp5;
141  float temp6, temp7, temp8, temp9;
142  float *ret;
143 
144  __asm__ volatile(
145  "andi %[temp0], %[idx], 15 \n\t"
146  "ext %[temp1], %[idx], 4, 4 \n\t"
147  "lw %[temp4], 0(%[scale]) \n\t"
148  "srl %[temp2], %[sign], 1 \n\t"
149  "sll %[temp3], %[sign], 31 \n\t"
150  "sll %[temp2], %[temp2], 31 \n\t"
151  "sll %[temp0], %[temp0], 2 \n\t"
152  "sll %[temp1], %[temp1], 2 \n\t"
153  "lwxc1 %[temp8], %[temp0](%[v]) \n\t"
154  "lwxc1 %[temp9], %[temp1](%[v]) \n\t"
155  "xor %[temp5], %[temp4], %[temp2] \n\t"
156  "xor %[temp4], %[temp4], %[temp3] \n\t"
157  "mtc1 %[temp5], %[temp6] \n\t"
158  "mtc1 %[temp4], %[temp7] \n\t"
159  "mul.s %[temp8], %[temp8], %[temp6] \n\t"
160  "mul.s %[temp9], %[temp9], %[temp7] \n\t"
161  "addiu %[ret], %[dst], 8 \n\t"
162  "swc1 %[temp8], 0(%[dst]) \n\t"
163  "swc1 %[temp9], 4(%[dst]) \n\t"
164 
165  : [temp0]"=&r"(temp0), [temp1]"=&r"(temp1),
166  [temp2]"=&r"(temp2), [temp3]"=&r"(temp3),
167  [temp4]"=&r"(temp4), [temp5]"=&r"(temp5),
168  [temp6]"=&f"(temp6), [temp7]"=&f"(temp7),
169  [temp8]"=&f"(temp8), [temp9]"=&f"(temp9),
170  [ret]"=&r"(ret)
171  : [idx]"r"(idx), [scale]"r"(scale), [v]"r"(v),
172  [dst]"r"(dst), [sign]"r"(sign)
173  : "memory"
174  );
175  return ret;
176 }
177 
178 static inline float *VMUL4S_mips(float *dst, const float *v, unsigned idx,
179  unsigned sign, const float *scale)
180 {
181  int temp0, temp1, temp2, temp3, temp4;
182  float temp10, temp11, temp12, temp13, temp14, temp15, temp16, temp17;
183  float *ret;
184  unsigned int mask = 1U << 31;
185 
186  __asm__ volatile(
187  "lw %[temp0], 0(%[scale]) \n\t"
188  "and %[temp1], %[idx], 3 \n\t"
189  "ext %[temp2], %[idx], 2, 2 \n\t"
190  "ext %[temp3], %[idx], 4, 2 \n\t"
191  "ext %[temp4], %[idx], 6, 2 \n\t"
192  "sll %[temp1], %[temp1], 2 \n\t"
193  "sll %[temp2], %[temp2], 2 \n\t"
194  "sll %[temp3], %[temp3], 2 \n\t"
195  "sll %[temp4], %[temp4], 2 \n\t"
196  "lwxc1 %[temp10], %[temp1](%[v]) \n\t"
197  "lwxc1 %[temp11], %[temp2](%[v]) \n\t"
198  "lwxc1 %[temp12], %[temp3](%[v]) \n\t"
199  "lwxc1 %[temp13], %[temp4](%[v]) \n\t"
200  "and %[temp1], %[sign], %[mask] \n\t"
201  "ext %[temp2], %[idx], 12, 1 \n\t"
202  "ext %[temp3], %[idx], 13, 1 \n\t"
203  "ext %[temp4], %[idx], 14, 1 \n\t"
204  "sllv %[sign], %[sign], %[temp2] \n\t"
205  "xor %[temp1], %[temp0], %[temp1] \n\t"
206  "and %[temp2], %[sign], %[mask] \n\t"
207  "mtc1 %[temp1], %[temp14] \n\t"
208  "xor %[temp2], %[temp0], %[temp2] \n\t"
209  "sllv %[sign], %[sign], %[temp3] \n\t"
210  "mtc1 %[temp2], %[temp15] \n\t"
211  "and %[temp3], %[sign], %[mask] \n\t"
212  "sllv %[sign], %[sign], %[temp4] \n\t"
213  "xor %[temp3], %[temp0], %[temp3] \n\t"
214  "and %[temp4], %[sign], %[mask] \n\t"
215  "mtc1 %[temp3], %[temp16] \n\t"
216  "xor %[temp4], %[temp0], %[temp4] \n\t"
217  "mtc1 %[temp4], %[temp17] \n\t"
218  "mul.s %[temp10], %[temp10], %[temp14] \n\t"
219  "mul.s %[temp11], %[temp11], %[temp15] \n\t"
220  "mul.s %[temp12], %[temp12], %[temp16] \n\t"
221  "mul.s %[temp13], %[temp13], %[temp17] \n\t"
222  "addiu %[ret], %[dst], 16 \n\t"
223  "swc1 %[temp10], 0(%[dst]) \n\t"
224  "swc1 %[temp11], 4(%[dst]) \n\t"
225  "swc1 %[temp12], 8(%[dst]) \n\t"
226  "swc1 %[temp13], 12(%[dst]) \n\t"
227 
228  : [temp0]"=&r"(temp0), [temp1]"=&r"(temp1),
229  [temp2]"=&r"(temp2), [temp3]"=&r"(temp3),
230  [temp4]"=&r"(temp4), [temp10]"=&f"(temp10),
231  [temp11]"=&f"(temp11), [temp12]"=&f"(temp12),
232  [temp13]"=&f"(temp13), [temp14]"=&f"(temp14),
233  [temp15]"=&f"(temp15), [temp16]"=&f"(temp16),
234  [temp17]"=&f"(temp17), [ret]"=&r"(ret),
235  [sign]"+r"(sign)
236  : [idx]"r"(idx), [scale]"r"(scale), [v]"r"(v),
237  [dst]"r"(dst), [mask]"r"(mask)
238  : "memory"
239  );
240  return ret;
241 }
242 
243 #define VMUL2 VMUL2_mips
244 #define VMUL4 VMUL4_mips
245 #define VMUL2S VMUL2S_mips
246 #define VMUL4S VMUL4S_mips
247 #endif /* HAVE_INLINE_ASM && HAVE_MIPSFPU */
248 
249 #endif /* AVCODEC_MIPS_AACDEC_FLOAT_H */
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