53 #define BITS_FRW_ACC 3 //; 2 or 3 for accuracy
54 #define SHIFT_FRW_COL BITS_FRW_ACC
55 #define SHIFT_FRW_ROW (BITS_FRW_ACC + 17 - 3)
56 #define RND_FRW_ROW (1 << (SHIFT_FRW_ROW-1))
59 #define X8(x) x,x,x,x,x,x,x,x
72 DECLARE_ALIGNED(16,
static const int16_t, fdct_one_corr)[8] = { X8(1) };
86 } tab_frw_01234567_sse2 =
89 #define TABLE_SSE2 C4, C4, C1, C3, -C6, -C2, -C1, -C5, \
90 C4, C4, C5, C7, C2, C6, C3, -C7, \
91 -C4, C4, C7, C3, C6, -C2, C7, -C5, \
92 C4, -C4, C5, -C1, C2, -C6, C3, -C1,
216 #define S(s) AV_TOSTRING(s) //AV_STRINGIFY is too long
218 #define FDCT_COL(cpu, mm, mov)\
219 static av_always_inline void fdct_col_##cpu(const int16_t *in, int16_t *out, int offset)\
222 #mov" 16(%0), %%"#mm"0 \n\t" \
223 #mov" 96(%0), %%"#mm"1 \n\t" \
224 #mov" %%"#mm"0, %%"#mm"2 \n\t" \
225 #mov" 32(%0), %%"#mm"3 \n\t" \
226 "paddsw %%"#mm"1, %%"#mm"0 \n\t" \
227 #mov" 80(%0), %%"#mm"4 \n\t" \
228 "psllw $"S(SHIFT_FRW_COL)", %%"#mm"0 \n\t" \
229 #mov" (%0), %%"#mm"5 \n\t" \
230 "paddsw %%"#mm"3, %%"#mm"4 \n\t" \
231 "paddsw 112(%0), %%"#mm"5 \n\t" \
232 "psllw $"S(SHIFT_FRW_COL)", %%"#mm"4 \n\t" \
233 #mov" %%"#mm"0, %%"#mm"6 \n\t" \
234 "psubsw %%"#mm"1, %%"#mm"2 \n\t" \
235 #mov" 16(%1), %%"#mm"1 \n\t" \
236 "psubsw %%"#mm"4, %%"#mm"0 \n\t" \
237 #mov" 48(%0), %%"#mm"7 \n\t" \
238 "pmulhw %%"#mm"0, %%"#mm"1 \n\t" \
239 "paddsw 64(%0), %%"#mm"7 \n\t" \
240 "psllw $"S(SHIFT_FRW_COL)", %%"#mm"5 \n\t" \
241 "paddsw %%"#mm"4, %%"#mm"6 \n\t" \
242 "psllw $"S(SHIFT_FRW_COL)", %%"#mm"7 \n\t" \
243 #mov" %%"#mm"5, %%"#mm"4 \n\t" \
244 "psubsw %%"#mm"7, %%"#mm"5 \n\t" \
245 "paddsw %%"#mm"5, %%"#mm"1 \n\t" \
246 "paddsw %%"#mm"7, %%"#mm"4 \n\t" \
247 "por (%2), %%"#mm"1 \n\t" \
248 "psllw $"S(SHIFT_FRW_COL)"+1, %%"#mm"2 \n\t" \
249 "pmulhw 16(%1), %%"#mm"5 \n\t" \
250 #mov" %%"#mm"4, %%"#mm"7 \n\t" \
251 "psubsw 80(%0), %%"#mm"3 \n\t" \
252 "psubsw %%"#mm"6, %%"#mm"4 \n\t" \
253 #mov" %%"#mm"1, 32(%3) \n\t" \
254 "paddsw %%"#mm"6, %%"#mm"7 \n\t" \
255 #mov" 48(%0), %%"#mm"1 \n\t" \
256 "psllw $"S(SHIFT_FRW_COL)"+1, %%"#mm"3 \n\t" \
257 "psubsw 64(%0), %%"#mm"1 \n\t" \
258 #mov" %%"#mm"2, %%"#mm"6 \n\t" \
259 #mov" %%"#mm"4, 64(%3) \n\t" \
260 "paddsw %%"#mm"3, %%"#mm"2 \n\t" \
261 "pmulhw (%4), %%"#mm"2 \n\t" \
262 "psubsw %%"#mm"3, %%"#mm"6 \n\t" \
263 "pmulhw (%4), %%"#mm"6 \n\t" \
264 "psubsw %%"#mm"0, %%"#mm"5 \n\t" \
265 "por (%2), %%"#mm"5 \n\t" \
266 "psllw $"S(SHIFT_FRW_COL)", %%"#mm"1 \n\t" \
267 "por (%2), %%"#mm"2 \n\t" \
268 #mov" %%"#mm"1, %%"#mm"4 \n\t" \
269 #mov" (%0), %%"#mm"3 \n\t" \
270 "paddsw %%"#mm"6, %%"#mm"1 \n\t" \
271 "psubsw 112(%0), %%"#mm"3 \n\t" \
272 "psubsw %%"#mm"6, %%"#mm"4 \n\t" \
273 #mov" (%1), %%"#mm"0 \n\t" \
274 "psllw $"S(SHIFT_FRW_COL)", %%"#mm"3 \n\t" \
275 #mov" 32(%1), %%"#mm"6 \n\t" \
276 "pmulhw %%"#mm"1, %%"#mm"0 \n\t" \
277 #mov" %%"#mm"7, (%3) \n\t" \
278 "pmulhw %%"#mm"4, %%"#mm"6 \n\t" \
279 #mov" %%"#mm"5, 96(%3) \n\t" \
280 #mov" %%"#mm"3, %%"#mm"7 \n\t" \
281 #mov" 32(%1), %%"#mm"5 \n\t" \
282 "psubsw %%"#mm"2, %%"#mm"7 \n\t" \
283 "paddsw %%"#mm"2, %%"#mm"3 \n\t" \
284 "pmulhw %%"#mm"7, %%"#mm"5 \n\t" \
285 "paddsw %%"#mm"3, %%"#mm"0 \n\t" \
286 "paddsw %%"#mm"4, %%"#mm"6 \n\t" \
287 "pmulhw (%1), %%"#mm"3 \n\t" \
288 "por (%2), %%"#mm"0 \n\t" \
289 "paddsw %%"#mm"7, %%"#mm"5 \n\t" \
290 "psubsw %%"#mm"6, %%"#mm"7 \n\t" \
291 #mov" %%"#mm"0, 16(%3) \n\t" \
292 "paddsw %%"#mm"4, %%"#mm"5 \n\t" \
293 #mov" %%"#mm"7, 48(%3) \n\t" \
294 "psubsw %%"#mm"1, %%"#mm"3 \n\t" \
295 #mov" %%"#mm"5, 80(%3) \n\t" \
296 #mov" %%"#mm"3, 112(%3) \n\t" \
298 : "r" (in + offset), "r" (fdct_tg_all_16), "r" (fdct_one_corr), \
299 "r" (out + offset), "r" (ocos_4_16)); \
302 FDCT_COL(sse2, xmm, movdqa)
307 #define FDCT_ROW_SSE2_H1(i,t) \
308 "movq " #i "(%0), %%xmm2 \n\t" \
309 "movq " #i "+8(%0), %%xmm0 \n\t" \
310 "movdqa " #t "+32(%1), %%xmm3 \n\t" \
311 "movdqa " #t "+48(%1), %%xmm7 \n\t" \
312 "movdqa " #t "(%1), %%xmm4 \n\t" \
313 "movdqa " #t "+16(%1), %%xmm5 \n\t"
315 #define FDCT_ROW_SSE2_H2(i,t) \
316 "movq " #i "(%0), %%xmm2 \n\t" \
317 "movq " #i "+8(%0), %%xmm0 \n\t" \
318 "movdqa " #t "+32(%1), %%xmm3 \n\t" \
319 "movdqa " #t "+48(%1), %%xmm7 \n\t"
321 #define FDCT_ROW_SSE2(i) \
322 "movq %%xmm2, %%xmm1 \n\t" \
323 "pshuflw $27, %%xmm0, %%xmm0 \n\t" \
324 "paddsw %%xmm0, %%xmm1 \n\t" \
325 "psubsw %%xmm0, %%xmm2 \n\t" \
326 "punpckldq %%xmm2, %%xmm1 \n\t" \
327 "pshufd $78, %%xmm1, %%xmm2 \n\t" \
328 "pmaddwd %%xmm2, %%xmm3 \n\t" \
329 "pmaddwd %%xmm1, %%xmm7 \n\t" \
330 "pmaddwd %%xmm5, %%xmm2 \n\t" \
331 "pmaddwd %%xmm4, %%xmm1 \n\t" \
332 "paddd %%xmm7, %%xmm3 \n\t" \
333 "paddd %%xmm2, %%xmm1 \n\t" \
334 "paddd %%xmm6, %%xmm3 \n\t" \
335 "paddd %%xmm6, %%xmm1 \n\t" \
336 "psrad %3, %%xmm3 \n\t" \
337 "psrad %3, %%xmm1 \n\t" \
338 "packssdw %%xmm3, %%xmm1 \n\t" \
339 "movdqa %%xmm1, " #i "(%4) \n\t"
341 "movdqa (%2), %%xmm6 \n\t"
342 FDCT_ROW_SSE2_H1(0,0)
344 FDCT_ROW_SSE2_H2(64,0)
347 FDCT_ROW_SSE2_H1(16,64)
349 FDCT_ROW_SSE2_H2(112,64)
352 FDCT_ROW_SSE2_H1(32,128)
354 FDCT_ROW_SSE2_H2(96,128)
357 FDCT_ROW_SSE2_H1(48,192)
359 FDCT_ROW_SSE2_H2(80,192)
362 : "
r" (in), "
r" (tab_frw_01234567_sse2.tab_frw_01234567_sse2),
365 "%xmm4", "%xmm5", "%xmm6", "%xmm7")
372 int16_t *
const block1= (int16_t*)align_tmp;