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21 #ifndef AVCODEC_ARM_AAC_H
22 #define AVCODEC_ARM_AAC_H
29 static inline float *
VMUL2(
float *
dst,
const float *v,
unsigned idx,
33 __asm__ (
"ubfx %0, %6, #0, #4 \n\t"
34 "ubfx %1, %6, #4, #4 \n\t"
35 "ldr %0, [%5, %0, lsl #2] \n\t"
36 "ldr %1, [%5, %1, lsl #2] \n\t"
37 "vld1.32 {d1[]}, [%7,:32] \n\t"
38 "vmov d0, %0, %1 \n\t"
39 "vmul.f32 d0, d0, d1 \n\t"
40 "vst1.32 {d0}, [%2,:64]! \n\t"
41 :
"=&r"(v0),
"=&r"(v1),
"+r"(
dst),
"=m"(
dst[0]),
"=m"(
dst[1])
42 :
"r"(v),
"r"(idx),
"r"(
scale)
48 static inline float *
VMUL4(
float *
dst,
const float *v,
unsigned idx,
51 unsigned v0, v1, v2, v3;
52 __asm__ (
"ubfx %0, %10, #0, #2 \n\t"
53 "ubfx %1, %10, #2, #2 \n\t"
54 "ldr %0, [%9, %0, lsl #2] \n\t"
55 "ubfx %2, %10, #4, #2 \n\t"
56 "ldr %1, [%9, %1, lsl #2] \n\t"
57 "ubfx %3, %10, #6, #2 \n\t"
58 "ldr %2, [%9, %2, lsl #2] \n\t"
59 "vmov d0, %0, %1 \n\t"
60 "ldr %3, [%9, %3, lsl #2] \n\t"
61 "vld1.32 {d2[],d3[]},[%11,:32] \n\t"
62 "vmov d1, %2, %3 \n\t"
63 "vmul.f32 q0, q0, q1 \n\t"
64 "vst1.32 {q0}, [%4,:128]! \n\t"
65 :
"=&r"(v0),
"=&r"(v1),
"=&r"(v2),
"=&r"(v3),
"+r"(
dst),
67 :
"r"(v),
"r"(idx),
"r"(
scale)
68 :
"d0",
"d1",
"d2",
"d3");
73 static inline float *
VMUL2S(
float *
dst,
const float *v,
unsigned idx,
74 unsigned sign,
const float *
scale)
76 unsigned v0, v1, v2, v3;
77 __asm__ (
"ubfx %0, %8, #0, #4 \n\t"
78 "ubfx %1, %8, #4, #4 \n\t"
79 "ldr %0, [%7, %0, lsl #2] \n\t"
80 "lsl %2, %10, #30 \n\t"
81 "ldr %1, [%7, %1, lsl #2] \n\t"
82 "lsl %3, %10, #31 \n\t"
83 "vmov d0, %0, %1 \n\t"
84 "bic %2, %2, #1<<30 \n\t"
85 "vld1.32 {d1[]}, [%9,:32] \n\t"
86 "vmov d2, %2, %3 \n\t"
87 "veor d0, d0, d2 \n\t"
88 "vmul.f32 d0, d0, d1 \n\t"
89 "vst1.32 {d0}, [%4,:64]! \n\t"
90 :
"=&r"(v0),
"=&r"(v1),
"=&r"(v2),
"=&r"(v3),
"+r"(
dst),
92 :
"r"(v),
"r"(idx),
"r"(
scale),
"r"(sign)
98 static inline float *
VMUL4S(
float *
dst,
const float *v,
unsigned idx,
99 unsigned sign,
const float *
scale)
101 unsigned v0, v1, v2, v3, nz;
102 __asm__ (
"vld1.32 {d2[],d3[]},[%13,:32] \n\t"
103 "ubfx %0, %12, #0, #2 \n\t"
104 "ubfx %1, %12, #2, #2 \n\t"
105 "ldr %0, [%11,%0, lsl #2] \n\t"
106 "ubfx %2, %12, #4, #2 \n\t"
107 "ldr %1, [%11,%1, lsl #2] \n\t"
108 "ubfx %3, %12, #6, #2 \n\t"
109 "ldr %2, [%11,%2, lsl #2] \n\t"
110 "vmov d0, %0, %1 \n\t"
111 "ldr %3, [%11,%3, lsl #2] \n\t"
112 "lsr %6, %12, #12 \n\t"
114 "vmov d1, %2, %3 \n\t"
115 "lsls %6, %6, #1 \n\t"
116 "and %0, %5, #1<<31 \n\t"
118 "lslcs %5, %5, #1 \n\t"
119 "lsls %6, %6, #1 \n\t"
120 "and %1, %5, #1<<31 \n\t"
122 "lslcs %5, %5, #1 \n\t"
123 "lsls %6, %6, #1 \n\t"
124 "and %2, %5, #1<<31 \n\t"
126 "lslcs %5, %5, #1 \n\t"
127 "vmov d4, %0, %1 \n\t"
128 "and %3, %5, #1<<31 \n\t"
129 "vmov d5, %2, %3 \n\t"
130 "veor q0, q0, q2 \n\t"
131 "vmul.f32 q0, q0, q1 \n\t"
132 "vst1.32 {q0}, [%4,:128]! \n\t"
133 :
"=&r"(v0),
"=&r"(v1),
"=&r"(v2),
"=&r"(v3),
"+r"(
dst),
134 "+r"(sign),
"=r"(nz),
136 :
"r"(v),
"r"(idx),
"r"(
scale)
137 :
"cc",
"d0",
"d1",
"d2",
"d3",
"d4",
"d5");
static float * VMUL2(float *dst, const float *v, unsigned idx, const float *scale)
Dequantization-related.
static float * VMUL2S(float *dst, const float *v, unsigned idx, unsigned sign, const float *scale)
static float * VMUL4(float *dst, const float *v, unsigned idx, const float *scale)
uint8_t ptrdiff_t const uint8_t ptrdiff_t int intptr_t intptr_t int int16_t * dst
static float * VMUL4S(float *dst, const float *v, unsigned idx, unsigned sign, const float *scale)
__asm__(".macro parse_r var r\n\t" "\\var = -1\n\t" _IFC_REG(0) _IFC_REG(1) _IFC_REG(2) _IFC_REG(3) _IFC_REG(4) _IFC_REG(5) _IFC_REG(6) _IFC_REG(7) _IFC_REG(8) _IFC_REG(9) _IFC_REG(10) _IFC_REG(11) _IFC_REG(12) _IFC_REG(13) _IFC_REG(14) _IFC_REG(15) _IFC_REG(16) _IFC_REG(17) _IFC_REG(18) _IFC_REG(19) _IFC_REG(20) _IFC_REG(21) _IFC_REG(22) _IFC_REG(23) _IFC_REG(24) _IFC_REG(25) _IFC_REG(26) _IFC_REG(27) _IFC_REG(28) _IFC_REG(29) _IFC_REG(30) _IFC_REG(31) ".iflt \\var\n\t" ".error \"Unable to parse register name \\r\"\n\t" ".endif\n\t" ".endm")
static void scale(int *out, const int *in, const int w, const int h, const int shift)