FFmpeg
cpu.c
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1 /*
2  * This file is part of FFmpeg.
3  *
4  * FFmpeg is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU Lesser General Public
6  * License as published by the Free Software Foundation; either
7  * version 2.1 of the License, or (at your option) any later version.
8  *
9  * FFmpeg is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12  * Lesser General Public License for more details.
13  *
14  * You should have received a copy of the GNU Lesser General Public
15  * License along with FFmpeg; if not, write to the Free Software
16  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
17  */
18 
19 #include <stddef.h>
20 #include <stdint.h>
21 #include <stdatomic.h>
22 
23 #include "attributes.h"
24 #include "cpu.h"
25 #include "cpu_internal.h"
26 #include "config.h"
27 #include "opt.h"
28 #include "common.h"
29 
30 #if HAVE_SCHED_GETAFFINITY
31 #ifndef _GNU_SOURCE
32 # define _GNU_SOURCE
33 #endif
34 #include <sched.h>
35 #endif
36 #if HAVE_GETPROCESSAFFINITYMASK || HAVE_WINRT
37 #include <windows.h>
38 #endif
39 #if HAVE_SYSCTL
40 #if HAVE_SYS_PARAM_H
41 #include <sys/param.h>
42 #endif
43 #include <sys/types.h>
44 #include <sys/sysctl.h>
45 #endif
46 #if HAVE_UNISTD_H
47 #include <unistd.h>
48 #endif
49 
50 static atomic_int cpu_flags = ATOMIC_VAR_INIT(-1);
51 static atomic_int cpu_count = ATOMIC_VAR_INIT(-1);
52 
53 static int get_cpu_flags(void)
54 {
55  if (ARCH_MIPS)
56  return ff_get_cpu_flags_mips();
57  if (ARCH_AARCH64)
58  return ff_get_cpu_flags_aarch64();
59  if (ARCH_ARM)
60  return ff_get_cpu_flags_arm();
61  if (ARCH_PPC)
62  return ff_get_cpu_flags_ppc();
63  if (ARCH_X86)
64  return ff_get_cpu_flags_x86();
65  if (ARCH_LOONGARCH)
66  return ff_get_cpu_flags_loongarch();
67  return 0;
68 }
69 
70 void av_force_cpu_flags(int arg){
71  if (ARCH_X86 &&
72  (arg & ( AV_CPU_FLAG_3DNOW |
73  AV_CPU_FLAG_3DNOWEXT |
74  AV_CPU_FLAG_MMXEXT |
75  AV_CPU_FLAG_SSE |
76  AV_CPU_FLAG_SSE2 |
77  AV_CPU_FLAG_SSE2SLOW |
78  AV_CPU_FLAG_SSE3 |
79  AV_CPU_FLAG_SSE3SLOW |
80  AV_CPU_FLAG_SSSE3 |
81  AV_CPU_FLAG_SSE4 |
82  AV_CPU_FLAG_SSE42 |
83  AV_CPU_FLAG_AVX |
84  AV_CPU_FLAG_AVXSLOW |
85  AV_CPU_FLAG_XOP |
86  AV_CPU_FLAG_FMA3 |
87  AV_CPU_FLAG_FMA4 |
88  AV_CPU_FLAG_AVX2 |
89  AV_CPU_FLAG_AVX512 ))
90  && !(arg & AV_CPU_FLAG_MMX)) {
91  av_log(NULL, AV_LOG_WARNING, "MMX implied by specified flags\n");
92  arg |= AV_CPU_FLAG_MMX;
93  }
94 
95  atomic_store_explicit(&cpu_flags, arg, memory_order_relaxed);
96 }
97 
98 int av_get_cpu_flags(void)
99 {
100  int flags = atomic_load_explicit(&cpu_flags, memory_order_relaxed);
101  if (flags == -1) {
102  flags = get_cpu_flags();
103  atomic_store_explicit(&cpu_flags, flags, memory_order_relaxed);
104  }
105  return flags;
106 }
107 
108 int av_parse_cpu_caps(unsigned *flags, const char *s)
109 {
110  static const AVOption cpuflags_opts[] = {
111  { "flags" , NULL, 0, AV_OPT_TYPE_FLAGS, { .i64 = 0 }, INT64_MIN, INT64_MAX, .unit = "flags" },
112 #if ARCH_PPC
113  { "altivec" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ALTIVEC }, .unit = "flags" },
114 #elif ARCH_X86
115  { "mmx" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX }, .unit = "flags" },
116  { "mmx2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX2 }, .unit = "flags" },
117  { "mmxext" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX2 }, .unit = "flags" },
118  { "sse" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE }, .unit = "flags" },
119  { "sse2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE2 }, .unit = "flags" },
120  { "sse2slow", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE2SLOW }, .unit = "flags" },
121  { "sse3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE3 }, .unit = "flags" },
122  { "sse3slow", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE3SLOW }, .unit = "flags" },
123  { "ssse3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSSE3 }, .unit = "flags" },
124  { "atom" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ATOM }, .unit = "flags" },
125  { "sse4.1" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE4 }, .unit = "flags" },
126  { "sse4.2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE42 }, .unit = "flags" },
127  { "avx" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVX }, .unit = "flags" },
128  { "avxslow" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVXSLOW }, .unit = "flags" },
129  { "xop" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_XOP }, .unit = "flags" },
130  { "fma3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_FMA3 }, .unit = "flags" },
131  { "fma4" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_FMA4 }, .unit = "flags" },
132  { "avx2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVX2 }, .unit = "flags" },
133  { "bmi1" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_BMI1 }, .unit = "flags" },
134  { "bmi2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_BMI2 }, .unit = "flags" },
135  { "3dnow" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_3DNOW }, .unit = "flags" },
136  { "3dnowext", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_3DNOWEXT }, .unit = "flags" },
137  { "cmov", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_CMOV }, .unit = "flags" },
138  { "aesni", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AESNI }, .unit = "flags" },
139  { "avx512" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVX512 }, .unit = "flags" },
140  { "slowgather", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SLOW_GATHER }, .unit = "flags" },
141 
142 #define CPU_FLAG_P2 AV_CPU_FLAG_CMOV | AV_CPU_FLAG_MMX
143 #define CPU_FLAG_P3 CPU_FLAG_P2 | AV_CPU_FLAG_MMX2 | AV_CPU_FLAG_SSE
144 #define CPU_FLAG_P4 CPU_FLAG_P3| AV_CPU_FLAG_SSE2
145  { "pentium2", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_P2 }, .unit = "flags" },
146  { "pentium3", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_P3 }, .unit = "flags" },
147  { "pentium4", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_P4 }, .unit = "flags" },
148 
149 #define CPU_FLAG_K62 AV_CPU_FLAG_MMX | AV_CPU_FLAG_3DNOW
150 #define CPU_FLAG_ATHLON CPU_FLAG_K62 | AV_CPU_FLAG_CMOV | AV_CPU_FLAG_3DNOWEXT | AV_CPU_FLAG_MMX2
151 #define CPU_FLAG_ATHLONXP CPU_FLAG_ATHLON | AV_CPU_FLAG_SSE
152 #define CPU_FLAG_K8 CPU_FLAG_ATHLONXP | AV_CPU_FLAG_SSE2
153  { "k6", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX }, .unit = "flags" },
154  { "k62", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_K62 }, .unit = "flags" },
155  { "athlon", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_ATHLON }, .unit = "flags" },
156  { "athlonxp", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_ATHLONXP }, .unit = "flags" },
157  { "k8", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_K8 }, .unit = "flags" },
158 #elif ARCH_ARM
159  { "armv5te", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV5TE }, .unit = "flags" },
160  { "armv6", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV6 }, .unit = "flags" },
161  { "armv6t2", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV6T2 }, .unit = "flags" },
162  { "vfp", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP }, .unit = "flags" },
163  { "vfp_vm", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP_VM }, .unit = "flags" },
164  { "vfpv3", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFPV3 }, .unit = "flags" },
165  { "neon", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_NEON }, .unit = "flags" },
166  { "setend", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SETEND }, .unit = "flags" },
167 #elif ARCH_AARCH64
168  { "armv8", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV8 }, .unit = "flags" },
169  { "neon", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_NEON }, .unit = "flags" },
170  { "vfp", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP }, .unit = "flags" },
171 #elif ARCH_MIPS
172  { "mmi", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMI }, .unit = "flags" },
173  { "msa", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MSA }, .unit = "flags" },
174 #elif ARCH_LOONGARCH
175  { "lsx", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_LSX }, .unit = "flags" },
176  { "lasx", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_LASX }, .unit = "flags" },
177 #endif
178  { NULL },
179  };
180  static const AVClass class = {
181  .class_name = "cpuflags",
182  .item_name = av_default_item_name,
183  .option = cpuflags_opts,
184  .version = LIBAVUTIL_VERSION_INT,
185  };
186  const AVClass *pclass = &class;
187 
188  return av_opt_eval_flags(&pclass, &cpuflags_opts[0], s, flags);
189 }
190 
191 int av_cpu_count(void)
192 {
193  static atomic_int printed = ATOMIC_VAR_INIT(0);
194 
195  int nb_cpus = 1;
196  int count = 0;
197 #if HAVE_WINRT
198  SYSTEM_INFO sysinfo;
199 #endif
200 #if HAVE_SCHED_GETAFFINITY && defined(CPU_COUNT)
201  cpu_set_t cpuset;
202 
203  CPU_ZERO(&cpuset);
204 
205  if (!sched_getaffinity(0, sizeof(cpuset), &cpuset))
206  nb_cpus = CPU_COUNT(&cpuset);
207 #elif HAVE_GETPROCESSAFFINITYMASK
208  DWORD_PTR proc_aff, sys_aff;
209  if (GetProcessAffinityMask(GetCurrentProcess(), &proc_aff, &sys_aff))
210  nb_cpus = av_popcount64(proc_aff);
211 #elif HAVE_SYSCTL && defined(HW_NCPUONLINE)
212  int mib[2] = { CTL_HW, HW_NCPUONLINE };
213  size_t len = sizeof(nb_cpus);
214 
215  if (sysctl(mib, 2, &nb_cpus, &len, NULL, 0) == -1)
216  nb_cpus = 0;
217 #elif HAVE_SYSCTL && defined(HW_NCPU)
218  int mib[2] = { CTL_HW, HW_NCPU };
219  size_t len = sizeof(nb_cpus);
220 
221  if (sysctl(mib, 2, &nb_cpus, &len, NULL, 0) == -1)
222  nb_cpus = 0;
223 #elif HAVE_SYSCONF && defined(_SC_NPROC_ONLN)
224  nb_cpus = sysconf(_SC_NPROC_ONLN);
225 #elif HAVE_SYSCONF && defined(_SC_NPROCESSORS_ONLN)
226  nb_cpus = sysconf(_SC_NPROCESSORS_ONLN);
227 #elif HAVE_WINRT
228  GetNativeSystemInfo(&sysinfo);
229  nb_cpus = sysinfo.dwNumberOfProcessors;
230 #endif
231 
232  if (!atomic_exchange_explicit(&printed, 1, memory_order_relaxed))
233  av_log(NULL, AV_LOG_DEBUG, "detected %d logical cores\n", nb_cpus);
234 
235  count = atomic_load_explicit(&cpu_count, memory_order_relaxed);
236 
237  if (count > 0) {
238  nb_cpus = count;
239  av_log(NULL, AV_LOG_DEBUG, "overriding to %d logical cores\n", nb_cpus);
240  }
241 
242  return nb_cpus;
243 }
244 
245 void av_cpu_force_count(int count)
246 {
247  atomic_store_explicit(&cpu_count, count, memory_order_relaxed);
248 }
249 
250 size_t av_cpu_max_align(void)
251 {
252  if (ARCH_MIPS)
253  return ff_get_cpu_max_align_mips();
254  if (ARCH_AARCH64)
255  return ff_get_cpu_max_align_aarch64();
256  if (ARCH_ARM)
257  return ff_get_cpu_max_align_arm();
258  if (ARCH_PPC)
259  return ff_get_cpu_max_align_ppc();
260  if (ARCH_X86)
261  return ff_get_cpu_max_align_x86();
262  if (ARCH_LOONGARCH)
263  return ff_get_cpu_max_align_loongarch();
264 
265  return 8;
266 }
AV_CPU_FLAG_VFP
#define AV_CPU_FLAG_VFP
Definition: cpu.h:66
av_force_cpu_flags
void av_force_cpu_flags(int arg)
Disables cpu detection and forces the specified flags.
Definition: cpu.c:70
AV_LOG_WARNING
#define AV_LOG_WARNING
Something somehow does not look correct.
Definition: log.h:186
AV_CPU_FLAG_SSE3
#define AV_CPU_FLAG_SSE3
Prescott SSE3 functions.
Definition: cpu.h:38
opt.h
cpu_count
static atomic_int cpu_count
Definition: cpu.c:51
av_cpu_force_count
void av_cpu_force_count(int count)
Overrides cpu count detection and forces the specified count.
Definition: cpu.c:245
AV_CPU_FLAG_LSX
#define AV_CPU_FLAG_LSX
Definition: cpu.h:77
av_popcount64
#define av_popcount64
Definition: common.h:153
AV_CPU_FLAG_SSE3SLOW
#define AV_CPU_FLAG_SSE3SLOW
SSE3 supported, but usually not faster.
Definition: cpu.h:39
ff_get_cpu_flags_arm
int ff_get_cpu_flags_arm(void)
Definition: cpu.c:149
AV_CPU_FLAG_3DNOW
#define AV_CPU_FLAG_3DNOW
AMD 3DNOW.
Definition: cpu.h:32
ff_get_cpu_max_align_loongarch
size_t ff_get_cpu_max_align_loongarch(void)
Definition: cpu.c:59
AVOption
AVOption.
Definition: opt.h:247
ATOMIC_VAR_INIT
#define ATOMIC_VAR_INIT(value)
Definition: stdatomic.h:31
atomic_int
intptr_t atomic_int
Definition: stdatomic.h:55
ff_get_cpu_flags_loongarch
int ff_get_cpu_flags_loongarch(void)
Definition: cpu.c:49
av_get_cpu_flags
int av_get_cpu_flags(void)
Return the flags which specify extensions supported by the CPU.
Definition: cpu.c:98
AV_CPU_FLAG_BMI1
#define AV_CPU_FLAG_BMI1
Bit Manipulation Instruction Set 1.
Definition: cpu.h:54
cpu_flags
static atomic_int cpu_flags
Definition: cpu.c:50
AV_CPU_FLAG_SSSE3
#define AV_CPU_FLAG_SSSE3
Conroe SSSE3 functions.
Definition: cpu.h:41
AV_CPU_FLAG_XOP
#define AV_CPU_FLAG_XOP
Bulldozer XOP functions.
Definition: cpu.h:49
av_parse_cpu_caps
int av_parse_cpu_caps(unsigned *flags, const char *s)
Parse CPU caps from a string and update the given AV_CPU_* flags based on that.
Definition: cpu.c:108
AV_CPU_FLAG_3DNOWEXT
#define AV_CPU_FLAG_3DNOWEXT
AMD 3DNowExt.
Definition: cpu.h:37
AV_CPU_FLAG_SLOW_GATHER
#define AV_CPU_FLAG_SLOW_GATHER
CPU has slow gathers.
Definition: cpu.h:57
AV_CPU_FLAG_AVX512
#define AV_CPU_FLAG_AVX512
AVX-512 functions: requires OS support even if YMM/ZMM registers aren't used.
Definition: cpu.h:56
ff_get_cpu_max_align_x86
size_t ff_get_cpu_max_align_x86(void)
Definition: cpu.c:253
cpu_internal.h
s
#define s(width, name)
Definition: cbs_vp9.c:257
AV_CPU_FLAG_ARMV6
#define AV_CPU_FLAG_ARMV6
Definition: cpu.h:64
AV_LOG_DEBUG
#define AV_LOG_DEBUG
Stuff which is only useful for libav* developers.
Definition: log.h:201
ff_get_cpu_max_align_mips
size_t ff_get_cpu_max_align_mips(void)
Definition: cpu.c:119
ff_get_cpu_max_align_aarch64
size_t ff_get_cpu_max_align_aarch64(void)
Definition: cpu.c:30
AV_CPU_FLAG_SSE4
#define AV_CPU_FLAG_SSE4
Penryn SSE4.1 functions.
Definition: cpu.h:44
arg
const char * arg
Definition: jacosubdec.c:67
LIBAVUTIL_VERSION_INT
#define LIBAVUTIL_VERSION_INT
Definition: version.h:85
AVClass
Describe the class of an AVClass context structure.
Definition: log.h:66
NULL
#define NULL
Definition: coverity.c:32
AV_CPU_FLAG_LASX
#define AV_CPU_FLAG_LASX
Definition: cpu.h:78
av_default_item_name
const char * av_default_item_name(void *ptr)
Return the context name.
Definition: log.c:235
AV_CPU_FLAG_MSA
#define AV_CPU_FLAG_MSA
Definition: cpu.h:74
av_cpu_max_align
size_t av_cpu_max_align(void)
Get the maximum data alignment that may be required by FFmpeg.
Definition: cpu.c:250
ff_get_cpu_flags_aarch64
int ff_get_cpu_flags_aarch64(void)
Definition: cpu.c:23
AV_CPU_FLAG_CMOV
#define AV_CPU_FLAG_CMOV
supports cmov instruction
Definition: cpu.h:51
AV_CPU_FLAG_ALTIVEC
#define AV_CPU_FLAG_ALTIVEC
standard
Definition: cpu.h:59
atomic_load_explicit
#define atomic_load_explicit(object, order)
Definition: stdatomic.h:96
av_cpu_count
int av_cpu_count(void)
Definition: cpu.c:191
AV_CPU_FLAG_SSE2
#define AV_CPU_FLAG_SSE2
PIV SSE2 functions.
Definition: cpu.h:34
AV_CPU_FLAG_SETEND
#define AV_CPU_FLAG_SETEND
Definition: cpu.h:71
AV_CPU_FLAG_AVXSLOW
#define AV_CPU_FLAG_AVXSLOW
AVX supported, but slow when using YMM registers (e.g. Bulldozer)
Definition: cpu.h:48
AV_CPU_FLAG_AVX
#define AV_CPU_FLAG_AVX
AVX functions: requires OS support even if YMM registers aren't used.
Definition: cpu.h:47
AV_CPU_FLAG_FMA4
#define AV_CPU_FLAG_FMA4
Bulldozer FMA4 functions.
Definition: cpu.h:50
cpu.h
AV_CPU_FLAG_AVX2
#define AV_CPU_FLAG_AVX2
AVX2 functions: requires OS support even if YMM registers aren't used.
Definition: cpu.h:52
AV_CPU_FLAG_SSE2SLOW
#define AV_CPU_FLAG_SSE2SLOW
SSE2 supported, but usually not faster.
Definition: cpu.h:35
AV_CPU_FLAG_NEON
#define AV_CPU_FLAG_NEON
Definition: cpu.h:68
AV_CPU_FLAG_FMA3
#define AV_CPU_FLAG_FMA3
Haswell FMA3 functions.
Definition: cpu.h:53
attributes.h
AV_CPU_FLAG_MMX2
#define AV_CPU_FLAG_MMX2
SSE integer functions or AMD MMX ext.
Definition: cpu.h:31
ff_get_cpu_flags_ppc
int ff_get_cpu_flags_ppc(void)
This function MAY rely on signal() or fork() in order to make sure AltiVec is present.
Definition: cpu.c:48
AV_CPU_FLAG_SSE42
#define AV_CPU_FLAG_SSE42
Nehalem SSE4.2 functions.
Definition: cpu.h:45
common.h
atomic_store_explicit
#define atomic_store_explicit(object, desired, order)
Definition: stdatomic.h:90
AV_CPU_FLAG_ARMV8
#define AV_CPU_FLAG_ARMV8
Definition: cpu.h:69
len
int len
Definition: vorbis_enc_data.h:426
ff_get_cpu_flags_x86
int ff_get_cpu_flags_x86(void)
Definition: cpu.c:90
get_cpu_flags
static int get_cpu_flags(void)
Definition: cpu.c:53
AV_CPU_FLAG_ATOM
#define AV_CPU_FLAG_ATOM
Atom processor, some SSSE3 instructions are slower.
Definition: cpu.h:43
av_opt_eval_flags
int av_opt_eval_flags(void *obj, const AVOption *o, const char *val, int *flags_out)
AVClass::class_name
const char * class_name
The name of the class; usually it is the same name as the context structure type to which the AVClass...
Definition: log.h:71
AV_CPU_FLAG_VFPV3
#define AV_CPU_FLAG_VFPV3
Definition: cpu.h:67
ff_get_cpu_max_align_arm
size_t ff_get_cpu_max_align_arm(void)
Definition: cpu.c:162
AV_CPU_FLAG_ARMV5TE
#define AV_CPU_FLAG_ARMV5TE
Definition: cpu.h:63
AV_CPU_FLAG_MMX
#define AV_CPU_FLAG_MMX
standard MMX
Definition: cpu.h:29
AV_CPU_FLAG_AESNI
#define AV_CPU_FLAG_AESNI
Advanced Encryption Standard functions.
Definition: cpu.h:46
atomic_exchange_explicit
#define atomic_exchange_explicit(object, desired, order)
Definition: stdatomic.h:106
AV_CPU_FLAG_SSE
#define AV_CPU_FLAG_SSE
SSE functions.
Definition: cpu.h:33
ff_get_cpu_flags_mips
int ff_get_cpu_flags_mips(void)
Definition: cpu.c:106
AV_CPU_FLAG_MMXEXT
#define AV_CPU_FLAG_MMXEXT
SSE integer functions or AMD MMX ext.
Definition: cpu.h:30
ff_get_cpu_max_align_ppc
size_t ff_get_cpu_max_align_ppc(void)
Definition: cpu.c:152
AV_CPU_FLAG_BMI2
#define AV_CPU_FLAG_BMI2
Bit Manipulation Instruction Set 2.
Definition: cpu.h:55
AV_CPU_FLAG_VFP_VM
#define AV_CPU_FLAG_VFP_VM
VFPv2 vector mode, deprecated in ARMv7-A and unavailable in various CPUs implementations.
Definition: cpu.h:70
AV_CPU_FLAG_MMI
#define AV_CPU_FLAG_MMI
Definition: cpu.h:73
AV_OPT_TYPE_FLAGS
@ AV_OPT_TYPE_FLAGS
Definition: opt.h:223
flags
#define flags(name, subs,...)
Definition: cbs_av1.c:561
av_log
#define av_log(a,...)
Definition: tableprint_vlc.h:28
AV_OPT_TYPE_CONST
@ AV_OPT_TYPE_CONST
Definition: opt.h:233
AV_CPU_FLAG_ARMV6T2
#define AV_CPU_FLAG_ARMV6T2
Definition: cpu.h:65
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