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28 #define HWCAP_RV(letter) (1ul << ((letter) - 'A'))
35 const unsigned long hwcap = getauxval(AT_HWCAP);
37 if (hwcap & HWCAP_RV(
'I'))
39 if (hwcap & HWCAP_RV(
'F'))
41 if (hwcap & HWCAP_RV(
'D'))
43 if (hwcap & HWCAP_RV(
'B'))
47 if (hwcap & HWCAP_RV(
'V'))
55 #if defined (__riscv_flen) && (__riscv_flen >= 32)
57 #if (__riscv_flen >= 64)
70 #ifdef __riscv_vectors
72 #if __riscv_v_elen >= 64
75 #if __riscv_v_elen_fp >= 32
77 #if __riscv_v_elen_fp >= 64
#define AV_CPU_FLAG_RVB_BASIC
Basic bit-manipulations.
#define AV_CPU_FLAG_RVF
F (single precision FP)
#define AV_CPU_FLAG_RVV_F64
Vectors of double's.
#define AV_CPU_FLAG_RVV_F32
Vectors of float's */.
#define AV_CPU_FLAG_RVB_ADDR
Address bit-manipulations.
#define AV_CPU_FLAG_RVD
D (double precision FP)
#define AV_CPU_FLAG_RVV_I32
Vectors of 8/16/32-bit int's */.
#define AV_CPU_FLAG_RVI
I (full GPR bank)
#define AV_CPU_FLAG_RVV_I64
Vectors of 64-bit int's */.
int ff_get_cpu_flags_riscv(void)